Method of manufacturing an insulated gate field effect device

Claim 1

In a method of manufacturing an insulated gate field effect device the steps comprising providing a semiconductor region of a first conductivity type, providing an electrically insulating layer on a surface of said semiconductor region at least at an area where a gate electrode is to be formed, forming a first silicon layer over at least said electrically insulating layer, providing a first oxidation preventing layer on said first silicon layer, providing a second silicon layer on said first oxidation preventing layer, removing at least a portion of said second silicon layer to form edges at remaining parts of said second silicon layer, said edges substantially coinciding with edges of said gate electrode to be formed, thermally oxidizing said edge portions of said second silicon layer to form oxidized edge portions, selectively etching away exposed portions of said first oxidation preventing layer, etching away said oxidized edge portions with previously covered portions of said first oxidation preventing layer remaining on said first silicon layer, thermally oxidizing exposed portions of said first silicon layer, etching away said remaining exposed portions of said first oxidation preventing layer and said first silicon layer thereunder at least down to said electrically insulating layer to form openings, implanting ions into said semiconductor region at a first doping concentration through said openings in said first silicon layer to form source and drain zone extensions of a second conductivity type at opposite sides of said gate electrode to be formed, etching away all remaining exposed oxide portions, and thermally oxidizing thus exposed surfaces of said first silicon layer to form a thermal oxide layer covering said gate electrode formed of said first silicon layer between said source and drain extensions.