Patent US4538236A successfully refreshed from Google Patents.
US4538236A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Adaptive digital signal coring circuit
Assignee: RCA Licensing Corp
•
Filing: 1982-09-24
•
Granted: 1985-08-27
•
Expires: 2002-09-24
Abstract
Abstract A digital signal coring circuit removes from a stream of incoming digital data words low-valued variations lying between upper and lower threshold reference values. Upper and lower threshold values are adjusted in response to the value of the outgoing cored digital data words so that such low-valued variations are removed over the entire range of values of the digital data words, and not merely around a baseline value.
Inventors
- 👤 Robert A. Dischert
- 👤 William H. Meise
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 18:54
CPC Classifications
H; H03; H03K; H03K19/00; H04; H04N; H04N7/00; H04N7/24; H04B; H04B14/00; H04B14/02; H04B14/04; H04B14/046
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
131 words
Digital signal coring apparatus comprising: a source of digital input signals; a source of first and second digital signals having values which determine a range of digital values; modifying means coupled to said source of first and second digital signals and responsive to a cored output signal for generating third and fourth digital signals corresponding to time varying upper and lower boundary values of said range of values; comparison means coupled to outputs of said source of digital input signals and said modifying means, for producing signal sample values representing the degree to which the input digital signals depart from said range of digital values; and means coupled to said comparison means and responsive to said signal sample values for producing said cored output signal by summing successive signal sample values.
Claim 2
Dependent Claim
131 words
Digital signal coring apparatus comprising: a source of digital input signals; a source of first and second digital signals having values which determine a range of digital values; modifying means coupled to said source of first and second digital signals and responsive to a cored output signal for generating third and fourth digital signals corresponding to time varying upper and lower boundary values of said range of values; comparison means coupled to outputs of said source of digital input signals and said modifying means, for producing signal sample values representing the degree to which the input digital signals depart from said range of digital values; and means coupled to said comparison means and responsive to said signal sample values for producing said cored output signal by summing successive signal sample values.
Claim 3
Dependent Claim
35 words
The apparatus of claim 1 wherein said modifying means comprises combining means for combining said cored output signals and each of said first and second digital signals to produce said third and fourth digital signals.
Claim 4
Dependent Claim
14 words
The apparatus of claim 1 wherein said means for producing cored output signals comprises:
Claim 5
Dependent Claim
34 words
storing means for storing digital signals; means for summing said signal sample values and the digital signals stored in said storing means; and means for applying said summed digital signals to said storing means.
Claim 6
Dependent Claim
34 words
storing means for storing digital signals; means for summing said signal sample values and the digital signals stored in said storing means; and means for applying said summed digital signals to said storing means.
Claim 7
Dependent Claim
76 words
The apparatus of claim 1 wherein said comparison means comprises: first and second comparators for comparing said input digital signals to the values representing the upper and lower boundaries of said range of digital values; said first comparator developing said signals sample values when said input digital signals are greater than said upper boundary value; and said second comparator developing said signal sample values when said input digital signals are less than said lower boundary value.
Claim 8
Dependent Claim
106 words
The apparatus of claim 4 wherein said means for producing cored output signals includes: a multiplexer having an output terminal at which cored output digital signals are available, having first and second input terminals coupled to said modifying means for coupling the upper and lower time varying boundary values thereto and having a control input terminal; means responsive to said first and second comparators for generating a control signal which is applied to said multiplexer control input terminals, said control signal causing said multiplexer to output the upper and lower time varying boundary values for said first and second comparators developing said signal sample values respectively.
Claim 9
Dependent Claim
209 words
Apparatus for developing cored digital signals from input digital signals comprising: a source of input digital signals; a source of first and second digital reference signals; storing means having input and output ports, for storing digital signals; means coupled to said source of first and second digital reference signals and the output port of said storing means for combining digital signals stored in said storing means and said first and second digital reference signals to produce first and second digital threshold signals, respectively; comparison means, having respective inputs coupled to outputs of said means for combining and said source of input digital signals for producing further digital signals representing the values and senses by which said input digital signals depart from a range of values between said first and second digital threshold signal values; means coupled to said comparison means and to the output port of said storing means for summing said further digital signals and said stored digital signals; means for applying said summed digital signals to the input port of said storing means, and wherein the samples contrained in said storing means correspond to cored digital signals; and wherein said first and second digital threshold signal values tend to track the envelope of said input digital signals.
Claim 10
Dependent Claim
209 words
Apparatus for developing cored digital signals from input digital signals comprising: a source of input digital signals; a source of first and second digital reference signals; storing means having input and output ports, for storing digital signals; means coupled to said source of first and second digital reference signals and the output port of said storing means for combining digital signals stored in said storing means and said first and second digital reference signals to produce first and second digital threshold signals, respectively; comparison means, having respective inputs coupled to outputs of said means for combining and said source of input digital signals for producing further digital signals representing the values and senses by which said input digital signals depart from a range of values between said first and second digital threshold signal values; means coupled to said comparison means and to the output port of said storing means for summing said further digital signals and said stored digital signals; means for applying said summed digital signals to the input port of said storing means, and wherein the samples contrained in said storing means correspond to cored digital signals; and wherein said first and second digital threshold signal values tend to track the envelope of said input digital signals.
Claim 11
Dependent Claim
73 words
The apparatus of claim 6 wherein said comparison means comprises: first comparator means for providing a positive difference digital signal corresponding to said further digital signal when the value of said input digital signal is greater than said first digital threshold signal; second comparator means for providing a negative difference digital signal corresponding to said further digital signal when the value of said input signal is lesser than said second digital threshold signal.
Claim 12
Dependent Claim
31 words
The apparatus of claim 7 wherein said comparison means further comprises an adder to which said positive difference and negative difference digital signals are coupled for providing said further digital signal.
Claim 13
Dependent Claim
43 words
The apparatus of claim 7 wherein said first and second comparator means each include a substractor for providing a difference signal and gating means responsive to the sign of said difference signal for providing said positive difference and negative difference digital signals, respectively.
Claim 14
Dependent Claim
58 words
The apparatus of claim 6 further comprising: a source of a third digital reference signal having a predetermined value; second comparison means for comparing said further digital signal and said third digital reference signal; means responsive to said second comparison means for selectively providing one of said first and second digital threshold signals as cored output digital signals.
Claim 15
Dependent Claim
64 words
The apparatus of claim 10 wherein said means for selectively providing comprises multiplexing means having first and second inputs at which said first and second threshold signals, respectively, are applied, and having a control terminal to which said second comparison means is coupled to cause said multiplexing means to select one of said first and second threshold signals as said cored output digital signal.
Claim 16
Dependent Claim
27 words
The apparatus of claim 6 wherein said source of first and second digital reference signals includes memory means for storing said first and second reference signals therein.
References Cited (Backward Citations)
US3716726A
Cited
US4004140A
Cited
US4118785A
Cited
US3979683A
Cited
US4240106A
Cited
US4064530A
Cited
US4305091B1
Cited
US4305091B2
Cited
US4305091A
Cited
US4157457A
Cited
US4167749A
Cited
US4250458A
Cited
US4394684A
Cited
GB2059203A
Cited
US4303943A
Cited
US4350995A
Cited
US4399460A
Cited
US4422094A
Cited
US4441121A
Cited
US4437123A
Cited
US4437124A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-08-26 | 1989-02-25 | 1989-08-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-08-26 | 1993-02-25 | 1993-08-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-08-26 | 1997-02-25 | 1997-08-27 | $7700.00 | Window Closed / Lapsed |