Semiconductor device having ribbon electrode structure and method for fabricating the same

Claim 1

A semiconductor device comprising: a semiconductor substrate having a pair of opposite major surfaces and including between said major surfaces a plurality of first semiconductor regions of one conductivity type exposed to one major surface of the substrate, and a second semiconductor region of another conductivity type opposite to said one conductivity type adjacent to said first semiconductor regions and exposed to said one major surface so that said first semiconductor regions are individually separated and surrounded by said second semiconductor region in said one major surface, a plurality of first conductive members each disposed to have a lower surface thereof directly on and in ohmic contact with said first semiconductor regions, each of said first conductive members having an upper surface having an area of a predetermined shape, and a second conductive member having a plurality of inner conductive portions which each have a lower surface disposed directly on and bonded conductively to corresponding upper surface portions of said first conductive members, wherein each said lower surface of each of said inner conductive portions has a region having a shape substantially corresponding to the shape of said upper surface of first conductive members to which it is bonded, said second conductive member further comprising a flexible outer conductive portion which is integrated with said inner conductive portions and which is not disposed directly on said first conductive members, wherein said upper and lower surfaces of said plurality of first conductive members have substantially the same predetermined shape, and further wherein each of said first semiconductor regions is constructed to have an area in said first major surface which has a predetermined shape which substantially corresponds to said predetermined shape of said upper and lower surfaces of said first conductive member, wherein said area of each of said first semiconductor regions in said first major surface is slightly greater than an area of either said upper or lower surfaces of said plurality of first conductive members, and wherein an area of lower surfaces of each of said regions of said inner conductive portions is slightly less than an area of either said upper or lower surfaces of said plurality of first conductive members.