US4097890A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Low parasitic capacitance and resistance beamlead semiconductor component and method of manufacture
Assignee: HP Inc
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Filing: 1977-03-23
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Granted: 1978-06-27
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Expires: 1997-03-23
Abstract
Abstract A beamlead semiconductor component and a method for manufacturing the semiconductor device with low parasitic capacitance and electrical resistance is provided. The beamlead component includes a thick layer of glass forming one end of the component directly beneath one of the beamleads and extending up to the edge of the active device on the beamlead surface of the component. On the opposite side of the active device from the glass layer is a metalized cavity that provides the electrical contact for a second beamlead with the semiconductor substrate. From the other surface, the non-beamlead surface, of the component another metalized cavity adjacent to the active region of the component and the metalized cavity on the beamlead surface has been etched. The cavity in the other surface of the component exposes a portion of the deepest surface of the metalization in the cavity on the beamlead surface to make electrical contact between the two metalizations. These interconnected cavities thus provide an electrical via between the two surfaces of the component. The use of the thick layer of glass beneath the one beamlead provides a considerable reduction in the parasitic capacitance between this beamlead and various layers of the substrate to which it is not connected. The metalized cavity in the other surface of the component substrate and the via reduces the resistance of the device by thinning the substrate beneath the active region and limiting the length of longest current path through the semiconductor material to a single thickness of that material.
Inventors
- 👤 Raymond A. Morris
- 👤 Thomas J. Viola, Jr.
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 10:04
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10D; H10D62/00; H10D62/10; H10D62/117; H10W44/00; H10W44/20; H10W72/00; H10W72/60
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
136 words
A low-parasitic capacitance and electrical resistance semiconductor component comprising: semiconductor means having a substrate with a first and a second surface, a plurality of edges, and a plurality of layers of selected conductivity types for implementing a selected semiconductor device on the first surface adjacent to one of said edges; a block of a selected glass juxtaposed to the full height and width of said one edge of the semiconductor means and extending over said one edge of the first surface of the semiconductor means to the semiconductor device with the exposed surface of the glass block being substantially flush with the surface thereof; and first conductive means extending across the exposed surface of the glass block for electrically contacting one of the layers of the semiconductor device on the first surface of the semiconductor means.
Claim 2
Dependent Claim
136 words
A low-parasitic capacitance and electrical resistance semiconductor component comprising: semiconductor means having a substrate with a first and a second surface, a plurality of edges, and a plurality of layers of selected conductivity types for implementing a selected semiconductor device on the first surface adjacent to one of said edges; a block of a selected glass juxtaposed to the full height and width of said one edge of the semiconductor means and extending over said one edge of the first surface of the semiconductor means to the semiconductor device with the exposed surface of the glass block being substantially flush with the surface thereof; and first conductive means extending across the exposed surface of the glass block for electrically contacting one of the layers of the semiconductor device on the first surface of the semiconductor means.
Claim 3
Dependent Claim
61 words
A semiconductor component as in claim 1 wherein said first conductive means includes a narrow region over the portion of the glass block extending between said one edge of the semiconductor means and the semiconductor device to further reduce the parasitic capacitance between the first conductive means and the layers of the semiconductor means to which it is not electrically connected.
Claim 4
Dependent Claim
176 words
A semiconductor component as in claim 1 wherein: said semiconductor means defines one cavity in its first surface adjacent to the semiconductor device and on another side of the semiconductor device from said glass block and another cavity in its second surface in registration with the semiconductor device and said one cavity on the first surface to thin the substrate beneath the semiconductor device to reduce the resistivity of said device, said other cavity being deep enough to open a portion of the deepest surface of the one cavity to the deepest surface of the other cavity, creating a via between the first and second surfaces of the semiconductor means; and a second conductive means deposited on the surfaces of the one and other cavities and the first surface of the substrate, extending thereacross away from the semiconductor device for providing electrical connection to the substrate on the second surface of the semiconductor means to further reduce the resistivity of the semiconductor device by shortening the current between the semiconductor device and the second conductive means.
Claim 5
Dependent Claim
29 words
A semiconductor component as in claim 3 wherein said first and second conductive means extend beyond the edge of the glass block and the substrate, respectively, to form beamleads.
Claim 6
Dependent Claim
196 words
A low electrical resistance semiconductor component comprising: semiconductor means having a substrate with a first and a second surface and a plurality of layers of selected conductivity types for implementing a selected semiconductor device on the first surface, said semiconductor means further defining one cavity in the first surface of the substrate adjacent to the semiconductor device and another cavity in the second surface of the substrate in registration with the semiconductor device and said one cavity on the first surface of the substrate for thinning the substrate beneath the semiconductor device to reduce the resistivity of said device, said other cavity being deep enough to open a portion of the deepest surface of the one cavity thereinto, creating a via between the first and second surfaces of the semiconductor means; and conductive means deposited on the surfaces of the one and other cavities and the first surface of the substrate extending thereacross away from the semiconductor device for providing an electrical connection to the substrate on the second surface of the semiconductor means to further reduce the resistivity of the semiconductor device by shortening the current path between the semiconductor device and the conductive means.
Claim 7
Dependent Claim
196 words
A low electrical resistance semiconductor component comprising: semiconductor means having a substrate with a first and a second surface and a plurality of layers of selected conductivity types for implementing a selected semiconductor device on the first surface, said semiconductor means further defining one cavity in the first surface of the substrate adjacent to the semiconductor device and another cavity in the second surface of the substrate in registration with the semiconductor device and said one cavity on the first surface of the substrate for thinning the substrate beneath the semiconductor device to reduce the resistivity of said device, said other cavity being deep enough to open a portion of the deepest surface of the one cavity thereinto, creating a via between the first and second surfaces of the semiconductor means; and conductive means deposited on the surfaces of the one and other cavities and the first surface of the substrate extending thereacross away from the semiconductor device for providing an electrical connection to the substrate on the second surface of the semiconductor means to further reduce the resistivity of the semiconductor device by shortening the current path between the semiconductor device and the conductive means.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-06-26 | 1981-12-26 | 1982-06-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-06-26 | 1985-12-26 | 1986-06-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-06-26 | 1989-12-26 | 1990-06-27 | $7700.00 | Window Closed / Lapsed |