Polysilicon-doped-first CMOS process

Claim 1

A process for forming a CMOS device from a structure comprising a body of n-type semiconductor material having first and second active regions, respectively, with a p-well formed in the first active region, and a 300-700 Angstroms thin silicon dioxide layer formed over said body encompassing a gate region within each of said active regions, said process consisting of: forming a polysilicon layer doped with n-type impurities over the thin silicon dioxide layer formed in said first and second active regions; forming an oxide mask over the polysilicon defining gates and interconnecting conductors; patterning the polysilicon in the presence of the oxide mask into gates corresponding to the gate regions and interconnecting conductors; forming a first photoresist mask over the second active region; implanting n-type impurities in source and drain regions defined in the first active region by the oxide mask; removing said first photoresist mask; forming a second photoresist mask over the first active region; implanting p-type impurities in source and drain regions defined in the second active region by the oxide mask; whereby said device has all n-type gates and interconnecting conductors of a single conductivity and is free of dopant penetration from said gates into said substrate via said thin silicon dioxide layer.