Patent US4415384A successfully refreshed from Google Patents.
US4415384A
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Method for manufacturing a semiconductive device
Assignee: Faurecia Clarion Electronics Co Ltd
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Filing: 1982-05-26
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Granted: 1983-11-15
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Expires: 2002-05-26
Abstract
Abstract A method for manufacturing a semiconductive device comprising: exposing a part of the surface of an n-type semiconductive substrate and covering the other part with an oxide film; partially providing the exposed part of the n-type semiconductive film with a film comprising a nitrided film and a polycrystalline silicon; doping boron through the exposed part of the n-type semiconductive substrate and the film provided on the same to thereby selectively form a p-type base region within the n-type semiconductive substrate; and, doping phosphorus or arsenic through the film on the exposed part of the n-type semiconductive substrate to thereby selectively form an collector ohmic region within the p-type base region.
Inventors
- 👤 Masayuki Hashimoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 13:28
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/01; H10D10/051; H10D48/00; H10D48/30; H10D48/32; H10D48/34; H10D48/345; H10P; H10P76/00; H10P76/40; Y; Y10; Y10S; Y10S438/00; Y10S438/914; Y10S438/923; Y10S438/965
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
92 words
A method for manufacturing a semiconductive device comprising: exposing a part of the surface of a first conductive-type semiconductive substrate and providing the other part with a first film; partially forming a second film on said exposed part of the surface of the first conductive-type semiconductive substrate; doping second conductive-type impurities through said exposed part and said second film to thereby selectively form a second conductive-type semiconductive region within said first conductive-type semiconductive substrate; and doping first conductive-type impurities through said second film to thereby selectively form a first conductive-type semiconductive region.
Claim 2
Independent Claim
92 words
A method for manufacturing a semiconductive device comprising: exposing a part of the surface of a first conductive-type semiconductive substrate and providing the other part with a first film; partially forming a second film on said exposed part of the surface of the first conductive-type semiconductive substrate; doping second conductive-type impurities through said exposed part and said second film to thereby selectively form a second conductive-type semiconductive region within said first conductive-type semiconductive substrate; and doping first conductive-type impurities through said second film to thereby selectively form a first conductive-type semiconductive region.
Claim 3
Dependent Claim
31 words
A method as claimed in claim 1 further comprising doping first conductive-type impurities within said first conductive-type semiconductive substrate to thereby selectively form a first conductive-type semiconductive region within said substrate.
Claim 4
Dependent Claim
20 words
A method as claimed in claim 1 or claim 2 in which said second film comprises at least polycrystalline silicon.
Claim 5
Dependent Claim
22 words
A method as claimed in claim 1 or claim 2 in which said second film comprises polycrystalline silicon film and nitrided film.
Claim 6
Independent Claim
180 words
A method for manufacturing a semiconductive device comprising: providing a first film on the surface of a first conductive-type semiconductive substrate and exposing a part thereof to form a first window at a portion for forming a base region; providing said window with a second film comprising polycrystalline silicon film and nitrided film; removing said second film except a part thereof for serving as an emitter contact and doping second conductive-type impurities through said part and said first window to thereby selectively forming a second conductive-type base region within said first conductive-type semiconductive substrate; removing said nitrided film from said remaining second film to thereby expose said polycrystalline silicon film and removing said first film at the part thereof for providing a collector ohmic region in to thereby form a second window; and doping first conductive-type impurities through exposed polycrystalline silicon film and said second window to thereby selectively form the collector ohmic region within said second conductive-type base region and a first conductive-type emitter region at a position corresponding to said second window within said first conductive-type semiconductive substrate.
Claim 7
Independent Claim
180 words
A method for manufacturing a semiconductive device comprising: providing a first film on the surface of a first conductive-type semiconductive substrate and exposing a part thereof to form a first window at a portion for forming a base region; providing said window with a second film comprising polycrystalline silicon film and nitrided film; removing said second film except a part thereof for serving as an emitter contact and doping second conductive-type impurities through said part and said first window to thereby selectively forming a second conductive-type base region within said first conductive-type semiconductive substrate; removing said nitrided film from said remaining second film to thereby expose said polycrystalline silicon film and removing said first film at the part thereof for providing a collector ohmic region in to thereby form a second window; and doping first conductive-type impurities through exposed polycrystalline silicon film and said second window to thereby selectively form the collector ohmic region within said second conductive-type base region and a first conductive-type emitter region at a position corresponding to said second window within said first conductive-type semiconductive substrate.
Claim 8
Dependent Claim
45 words
A method as claimed in claim 5 further comprising: selectively removing said first film at a part thereof corresponding to said base region to thereby form a third window; and providing said second and third windows with a collector electrode and a base electrode, respectively.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1986-11-14 | 1987-05-16 | 1987-11-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1990-11-14 | 1991-05-16 | 1991-11-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1994-11-14 | 1995-05-16 | 1995-11-15 | $7700.00 | Window Closed / Lapsed |