Method of forming metal silicide interconnection electrodes in I2 L-semiconductor devices

Claim 1

A manufacturing method of an integrated injection logic semiconductor device comprising the steps of: forming an insulating layer on a surface of a semiconductor substrate of a second conductivity type for forming an integrated injection logic, having a first conductivity type injector region formed within a second conductivity type semiconductor region whose one surface is exposed, a first conductivity type base region formed so as to face the injector region through part of said second conductivity type semiconductor region and to expose a part of the surface thereof, and at least one second conductivity type collector region formed, of which one surface is exposed and the remaining ones are surrounded by the base region; forming contact holes in the insulating layer at the locations, respectively, facing said injector region, the base region and the exposed surface of the collector region; forming first, second and third semiconductor regions with first, second and third impurity concentrations on the exposed surfaces of said injector region, the base region and the collector region by injecting first conductivity type ions through the contact holes, the impurity concentrations of said first, second and third semiconductor regions being 1×10 19 /cm 3 or more; and forming interconnection electrodes made of silicide of high melting point metal on said first, second and third semiconductor regions.