US4114256A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Reliable metal-to-junction contacts in large-scale-integrated devices
Assignee: AT&T Inc
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Filing: 1977-06-24
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Granted: 1978-09-19
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Expires: 1997-06-24
Abstract
Abstract A self-aligned technique for making metal-to-junction contacts in a shallow-junction large-scale-integrated device involves opening very small contact windows in the intermediate insulating layer of the device. These windows respectively overlie only limited central regions of the junctions. Impurities are then applied via the contact windows to provide deeper junction portions directly below the windows. As a result, metallic contact regions subsequently deposited in the windows are exactly aligned with respect to the deeper junction portions. Penetration or spiking of the junctions by the metallic regions is thereby significantly reduced.
Inventors
- 👤 Louis Robert Thibault
- 👤 Leopoldo Dy Yau
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 18:37
CPC Classifications
H; H10; H10P; H10P76/00; H10P76/40; H10D; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; Y; Y10; Y10S; Y10S438/00; Y10S438/965
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
141 words
A method for making reliable low-resistance electrical connections to shallow-junction regions of an LSI device, said method comprising the steps of forming a relatively thick insulating layer on the front surface of said device overlying said shallow-junction regions forming contact window openings in said insulating layer respectively overlying only central portions of said shallow junction regions, in a single gettering step, gettering damage sites from both the front and back surfaces of said device and, during said single gettering step, introducing an impurity into said device via said contact window openings to form relatively deep junction portions in the central portions only of said shallow-junction regions in direct alignment with said openings, and forming a conductive pattern on said insulating layer and in said contact window openings directly overlying said relatively deep junction portions to establish electrical connections to said regions.
Claim 2
Independent Claim
141 words
A method for making reliable low-resistance electrical connections to shallow-junction regions of an LSI device, said method comprising the steps of forming a relatively thick insulating layer on the front surface of said device overlying said shallow-junction regions forming contact window openings in said insulating layer respectively overlying only central portions of said shallow junction regions, in a single gettering step, gettering damage sites from both the front and back surfaces of said device and, during said single gettering step, introducing an impurity into said device via said contact window openings to form relatively deep junction portions in the central portions only of said shallow-junction regions in direct alignment with said openings, and forming a conductive pattern on said insulating layer and in said contact window openings directly overlying said relatively deep junction portions to establish electrical connections to said regions.
References Cited (Backward Citations)
US4033026A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-09-18 | 1982-03-20 | 1982-09-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-09-18 | 1986-03-20 | 1986-09-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-09-18 | 1990-03-20 | 1990-09-19 | $7700.00 | Window Closed / Lapsed |