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US4376657A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of making fault-free surface zone in semiconductor devices by step-wise heat treating
Assignee: Toshiba Corp
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Filing: 1980-12-05
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Granted: 1983-03-15
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Expires: 2000-12-05
Abstract
Abstract In a gettering method for processing semiconductor wafers a semiconductor wafer such as a silicon wafer is first annealed in a non-oxidizing atmosphere, for example, in a nitrogen atmosphere, at a temperature in the range of 950° to 1,300° C., preferably at 1,050° C., for more than 10 minutes, for example for four (4) hours, to diffuse out oxygen near the surfaces of the semiconductor wafer. Then the semiconductor wafer is annealed at a temperature in the range of 600° to 800° C., for example at 650° C., for more than one hour, preferably for 16 hours, to create in the interior of the semiconductor wafer microdefects of high density.
Inventors
- 👤 Kazutoshi Nagasawa
- 👤 Seigo Kishino
- 👤 Yoshiaki Matsushita
- 👤 Masaru Kanamori
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 23:50
CPC Classifications
H; H10; H10P; H10P36/00; H10P36/20; Y; Y10; Y10S; Y10S148/00; Y10S148/128
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
93 words
In a method of manufacturing a semiconductor device, a method of forming in a semiconductor wafer denuded zones near the surfaces thereof without creating microdefects but creating in the interior of the semiconductor wafer microdefects capable of gettering, comprising the steps of: heat treating said semiconductor wafer at a temperature in the range of 950° to 1,300° C. for more than 10 minutes but preferably less than 70 hours in a non-oxidizing atmosphere, and heat treating thereafter at a temperature in the range of 600° to 800° C. at least for one hour.
Claim 2
Dependent Claim
93 words
In a method of manufacturing a semiconductor device, a method of forming in a semiconductor wafer denuded zones near the surfaces thereof without creating microdefects but creating in the interior of the semiconductor wafer microdefects capable of gettering, comprising the steps of: heat treating said semiconductor wafer at a temperature in the range of 950° to 1,300° C. for more than 10 minutes but preferably less than 70 hours in a non-oxidizing atmosphere, and heat treating thereafter at a temperature in the range of 600° to 800° C. at least for one hour.
Claim 3
Dependent Claim
13 words
The method of claim 1 wherein said semiconductor wafer is a silicon wafer.
Claim 4
Dependent Claim
40 words
The method of claim 1 wherein in said first heat treating step said semiconductor wafer is heat treated at 1,050° C. for four (4) hours in a nitrogen atmosphere to diffuse out oxygen near the surfaces of said semiconductor wafer.
Claim 5
Dependent Claim
39 words
The method of claim 1 or 3 wherein in said second heat treating step said semiconductor wafer is heat treated at 650° C. for 16 hours to create in the interior of said semiconductor wafer microdefects of high density.
Claim 6
Dependent Claim
13 words
The method of claim 3 wherein said semiconductor wafer is a silicon wafer.
Claim 7
Dependent Claim
13 words
The method of claim 4 wherein said semiconductor wafer is a silicon wafer.
Claim 8
Dependent Claim
46 words
The method of claim 2 or 3 further comprising the step of forming a field oxide layer on the surface of said semiconductor wafer by heat treatment, wherein the denuded zones near the surface and the microdefects in the interior capable of gettering remain substantially unchanged.
Claim 9
Dependent Claim
44 words
The method of claim 4 further comprising the step of forming a field oxide layer on the surface of said semiconductor wafer by heat treatment, wherein the denuded zones near the surface and the microdefects in the interior capable of gettering remain substantially unchanged.
Claim 10
Dependent Claim
46 words
The method of claim 2 or 3 further comprising the step of forming a silicon epitaxial layer on the surface of said semiconductor wafer by heat treatment, wherein the denuded zones near the surface and the microdefects in the interior capable of gettering remain substantially unchanged.
References Cited (Backward Citations)
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Cited
US4042419A
Cited
US4116719A
Cited
US4154873A
Cited
US4149905A
Cited
US4220483A
Cited
US4314595A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1986-03-14 | 1986-09-13 | 1987-03-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1990-03-14 | 1990-09-13 | 1991-03-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1994-03-14 | 1994-09-13 | 1995-03-15 | $7700.00 | Window Closed / Lapsed |