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US4374357A
Expired / Lapsed
US
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Switched capacitor precision current source
Assignee: Motorola Solutions Inc
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Filing: 1981-07-27
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Granted: 1983-02-15
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Expires: 2001-07-27
Abstract
Abstract A switched capacitor precision current source uses a capacitance to store a predetermined charge in response to a clock to provide an average current proportional to the frequency of the clock and the predetermined charge. The average current is useful for generating bias voltages for N channel and P channel current sources.
Inventors
- 👤 Andrew Olesin
- 👤 Kevin K. L. Luke
- 👤 Robert D. Lee
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 18:53
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/24; G05F3/242; G05F3/247
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
92 words
A switched capacitor precision current source for providing a precision current via an output node, comprising: capacitance means for storing charge; current means for receiving a first reference voltage and for sourcing current from the output node to a charge node so long as the voltage on the charge node is less than a second reference voltage which is proportional to the first reference voltage; charging means for charging the capacitance means from the charge node during a charge period; and discharging means for discharging the capacitance means during a discharge period.
Claim 2
Dependent Claim
92 words
A switched capacitor precision current source for providing a precision current via an output node, comprising: capacitance means for storing charge; current means for receiving a first reference voltage and for sourcing current from the output node to a charge node so long as the voltage on the charge node is less than a second reference voltage which is proportional to the first reference voltage; charging means for charging the capacitance means from the charge node during a charge period; and discharging means for discharging the capacitance means during a discharge period.
Claim 3
Dependent Claim
33 words
The precision current source of claim 1 further comprising a bias means coupled to the output node for providing a voltage for biasing transistors to provide a current proportional to the precision current.
Claim 4
Dependent Claim
70 words
The precision current source of claim 1 or 2 wherein the current means further comprises: a current source; a first transistor having a source coupled to the first reference voltage, and a gate and a drain coupled to the current source; and a second transistor having a gate coupled to the gate of the first transistor, a source coupled to the charge node, and a drain providing the output node.
Claim 5
Dependent Claim
25 words
The precision current source of claim 3 wherein the charging means is a P channel transistor and the discharging means is an N channel transistor.
Claim 6
Dependent Claim
42 words
The precision current source of claim 1 further comprising: second capacitance means for storing charge; second charging means for charging the second capacitance means during the discharge period; and second discharging means for discharging the second capacitance means during the charge period.
Claim 7
Dependent Claim
33 words
The precision current source of claim 5 further comprising a bias means coupled to the output node for providing a voltage for biasing transistors to provide a current proportional to the precision current.
Claim 8
Dependent Claim
70 words
The precision current source of claim 5 or 6 wherein the current means further comprises: a current source; a first transistor having a source coupled to the first reference voltage, and a gate and a drain coupled to the current source; and a second transistor having a gate coupled to the gate of the first transistor, a source coupled to the charge node, and a drain providing the output node.
Claim 9
Dependent Claim
49 words
The precision current source of claim 7 wherein the first charging means is a first P channel transistor, the first discharging means is a first N channel transistor, the second charging means is a second P channel transistor, and the second discharging means is a second N channel transistor.
Claim 10
Dependent Claim
22 words
The precision current source of claim 8 wherein the bias means further comprises filter means for filtering ripple of the precision current.
Claim 11
Dependent Claim
131 words
A precision current source, comprising: a current source; a capacitor; a first N channel transistor having a source for receiving a reference voltage, and a drain and a gate coupled to the current source; a second N channel transistor having a gate coupled to the gate of the first N channel transistor, a drain providing an output, and a source; a first P channel transistor having a gate for receiving a clock signal, a source coupled to the source of the second N channel transistor, and a drain coupled to a first terminal of the capacitor; and a third N channel transistor having a gate for receiving the clock signal, a drain coupled to the first terminal of the capacitor, and a source coupled to a second terminal of the capacitor.
Claim 12
Dependent Claim
131 words
A precision current source, comprising: a current source; a capacitor; a first N channel transistor having a source for receiving a reference voltage, and a drain and a gate coupled to the current source; a second N channel transistor having a gate coupled to the gate of the first N channel transistor, a drain providing an output, and a source; a first P channel transistor having a gate for receiving a clock signal, a source coupled to the source of the second N channel transistor, and a drain coupled to a first terminal of the capacitor; and a third N channel transistor having a gate for receiving the clock signal, a drain coupled to the first terminal of the capacitor, and a source coupled to a second terminal of the capacitor.
Claim 13
Dependent Claim
100 words
The precision current source of claim 10 further comprising: an inverter having an input for receiving the clock signal; a second capacitor; a second P channel transistor having a gate coupled to an output of the inverter, a source coupled to the source of the second N channel transistor, and a drain coupled to a first terminal of the second capacitor; and a fourth N channel transistor having a gate coupled to the output of the inverter, a drain coupled to the first terminal of the second capacitor, and a source coupled to a second terminal of the second capacitor.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1986-02-14 | 1986-08-16 | 1987-02-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1990-02-14 | 1990-08-16 | 1991-02-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1994-02-14 | 1994-08-16 | 1995-02-15 | $7700.00 | Window Closed / Lapsed |