US4199693A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Compensated MOS timing network
Assignee: Samsung Electronics Co Ltd
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Filing: 1978-02-07
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Granted: 1980-04-22
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Expires: 1998-02-07
Abstract
Abstract An MOS compensation circuit for stabilizing the discharge of a timing capacitor including first and second inverter circuits and an interconnecting feedback circuit which effectively compensate for impedance variances in a capacitor-discharging MOS transistor, particularly those impedance variances due to fabrication tolerance dependent parameters.
Inventors
- 👤 Alton W. Bennett
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 06:22
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/24; G05F3/242; H; H03; H03K; H03K17/00; H03K17/14; H03K17/145; H03K17/28; H03K17/284; H03K19/00; H03K19/003; H03K19/00369; H03K19/00384
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
184 words
An MOS circuit comprising: a depletion MOS device having its first non-control electrode connected to a reference voltage and its gate and second non-control electrode connected to a first common point; an enhancement MOS device having its gate electrode connected to said first reference voltage, a first non-control electrode connected to said first common point and a second non-control electrode connected to a reference point; a second depletion MOS device having is first non-control electrode connected to said reference voltage and its gate and second non-control electrode connected to a second common point; a second enhancement MOS device having its gate connected to said first common point, one non-control electrode connected to said second common point and one non-control electrode connected to said reference point; a third depletion MOS device having its gate and one non-control electrode connected to said first common point, and a second non-control electrode; and a fourth depletion MOS device having its gate and one non-control electrode connected to said second common point and its second non-control electrode connected to the second non-control electrode of said third depletion MOS device.
Claim 2
Dependent Claim
184 words
An MOS circuit comprising: a depletion MOS device having its first non-control electrode connected to a reference voltage and its gate and second non-control electrode connected to a first common point; an enhancement MOS device having its gate electrode connected to said first reference voltage, a first non-control electrode connected to said first common point and a second non-control electrode connected to a reference point; a second depletion MOS device having is first non-control electrode connected to said reference voltage and its gate and second non-control electrode connected to a second common point; a second enhancement MOS device having its gate connected to said first common point, one non-control electrode connected to said second common point and one non-control electrode connected to said reference point; a third depletion MOS device having its gate and one non-control electrode connected to said first common point, and a second non-control electrode; and a fourth depletion MOS device having its gate and one non-control electrode connected to said second common point and its second non-control electrode connected to the second non-control electrode of said third depletion MOS device.
Claim 3
Dependent Claim
34 words
A circuit according to claim 1 and further including: a capacitive means; and discharge means responsive to the voltage level of said second common point for discharging said capacitive means at a constant rate.
Claim 4
Dependent Claim
43 words
A circuit according to claim 2 wherein said discharge means is a single MOS device having a gate connected to said second common point, a first non-control electrode connected to said capacitor means, and a second non-control electrode connected to said reference point.
Claim 5
Dependent Claim
24 words
A circuit according to claim 3 and further including charging means for charging said capacitive means in response to an externally supplied control signal.
Claim 6
Dependent Claim
43 words
A circuit according to claim 4 wherein said charging means includes a single MOS device having a gate coupled to receive said control signal, a first non-control electrode connected to said capacitive means, and a second non-control electrode connected to said reference voltage.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1983-04-22 | 1983-10-22 | 1984-04-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1987-04-22 | 1987-10-22 | 1988-04-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1991-04-22 | 1991-10-22 | 1992-04-22 | $7700.00 | Window Closed / Lapsed |