Current control circuit with current proportional circuit

Claim 2

A current control circuit comprising: first means, having first and second terminals, for controlling currents such that the current flowing into the first terminal is in a proportional relationship with the current flowing into the second terminal; second means, connected between the first terminal of said first means and a common potential terminal, from which an output signal is delivered; third means for supplying a constant current to each of said first and second terminals; and fourth means connected between said first and third means for selectively steering the constant current from said third means to one of said first and second terminals of said first means in response to a first digital input information signal applied to said fourth means.

Claim 3

A current control circuit according to claim 1, further including fifth means provided between said third means and said fourth means to interrupt the current supplied from said third means to said fourth means in response to a second digital input information signal applied to said fifth means.

Claim 4

A current control circuit according to claim 2, wherein said fourth means comprises a pair of transistors, each emitter of which is commonly connected to each other, and each collector of which is coupled with said respective terminals of said first means, said first digital input information signal supplied to the bases of said transistors in such a manner that said pair of transistors is switched in response to said first digital input information signal, and said fifth means comprises another pair of transistors, each emitter of which is commonly connected to each other and connected with said third means, and the collector of one of which is coupled with said common emitter of said fourth means while the other collector is connected to said common potential terminal, said second digital input information signal supplied to the bases of said another pair of transistors is swiched in response to said second digital input information signal.

Claim 5

A current control circuit according to claim 2, further including sixth means coupled with said fourth means, for outputting a delta-modulated signal, seventh means coupled with said fifth means, for supplying said second digital information signal which is pulse signal to said fifth means, eighth means connected to said second means which comprises a capacitor, for comparing an input analog signal with the output signal of said second means, and nineth means for generating said delta-modulated signal, to which the output of said eighth means and the pulse signal of said seventh means are supplied, the output terminal of said nineth means coupled with said sixth means whereby the analog signal is converted into the delta-modulated signal.

Claim 6

A current control circuit according to claim 2, further including an oscillator, the output frequency of which is controlled by an applied voltage, the output of said oscillator applied to said fifth means to be switched thereby, said second means which comprises a capacitor coupled to said oscillator to control the frequency thereof, and said first digital input information signal is a pulse signal sequence for controlling the frequency of said oscillator.

Claim 7

A current control circuit according to claim 2, further including a flip-flop circuit, the output of which is supplied to said fourth means, an input terminal, connected with said flip-flop circuit and said fifth means, said input terminal supplying a unipolar pulse sequence thereto, and a resistor which comprises said second means, whereby the unipolar pulse sequency is converted into a bipolar pulse sequency.

Claim 8

A current control circuit according to claim 1, wherein said first means conprises: a power supply having an output terminal, a diode and first resistor connected serially between said power supply terminal and said second terminal of said first means, a transistor having a base, collector and emitter of which the base, collector and emitter are connected respectively to said second terminal of the first means, said first terminal of the first means and the power supply output terminal.