US3939432A
Expired / Lapsed
US
⏱️ 0.0 years remaining
FM limiter with input level sensing and TTL level output
Assignee: Tektronix Inc
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Filing: 1974-03-18
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Granted: 1976-02-17
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Expires: 1994-03-18
Abstract
Abstract A system for limiting an FM signal to produce outputs which are TTL compatible, yet retain the zero crossings of the incoming FM signal as long as the amplitude of that signal remains above a chosen minimum and the frequency remains less than a chosen amount.
Inventors
- 👤 Larry Allan Nelson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 02:56
CPC Classifications
H; H03; H03G; H03G11/00; H03G11/06; H03K; H03K3/00; H03K3/02; H03K3/027; H04; H04N; H04N11/00; H04N11/06; H04N11/18; H04N11/186
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
92 words
An analog limiter with input level sensing and TTL level output, comprising: Schmitt trigger means responsive to the amplitude of an analog signal applied thereto for providing a first square wave; comparator means responsive to the zero crossings of an analog signal applied thereto for providing a second square wave; means responsive to said first and second square waves for providing a data signal and a timing signal; and means responsive to both said data and timing signals for providing an output square wave having the zero crossings of said analog signal.
Claim 2
Dependent Claim
92 words
An analog limiter with input level sensing and TTL level output, comprising: Schmitt trigger means responsive to the amplitude of an analog signal applied thereto for providing a first square wave; comparator means responsive to the zero crossings of an analog signal applied thereto for providing a second square wave; means responsive to said first and second square waves for providing a data signal and a timing signal; and means responsive to both said data and timing signals for providing an output square wave having the zero crossings of said analog signal.
Claim 3
Independent Claim
177 words
The method of deriving a digital output signal in response to an analog input signal where the output signal maintains the zero crossings of the analog input comprising the steps of: applying the analog input signal to a means responsive to the amplitude of the analog input signal; applying the analog input signal to a means responsive to the zero crossings of the analog input signal; generating a first output square wave defining a data signal in response to the amplitude of the analog input signal; generating a second output square wave in response to the zero crossings of the analog input signal; applying said first and second output square waves to a means responsive to both said first and second output square waves; generating a clock signal in response to the anticoincidence of both said first and second output square waves; applying both said data and clock signals to a means responsive to said data signal and said clock signal; and generating the digital output signal in response to said data signal and said clock signal.
Claim 4
Independent Claim
177 words
The method of deriving a digital output signal in response to an analog input signal where the output signal maintains the zero crossings of the analog input comprising the steps of: applying the analog input signal to a means responsive to the amplitude of the analog input signal; applying the analog input signal to a means responsive to the zero crossings of the analog input signal; generating a first output square wave defining a data signal in response to the amplitude of the analog input signal; generating a second output square wave in response to the zero crossings of the analog input signal; applying said first and second output square waves to a means responsive to both said first and second output square waves; generating a clock signal in response to the anticoincidence of both said first and second output square waves; applying both said data and clock signals to a means responsive to said data signal and said clock signal; and generating the digital output signal in response to said data signal and said clock signal.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1979-02-16 | 1979-08-18 | 1980-02-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1983-02-16 | 1983-08-18 | 1984-02-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1987-02-16 | 1987-08-18 | 1988-02-17 | $7700.00 | Window Closed / Lapsed |