Patent US4334349A successfully refreshed from Google Patents.
US4334349A
Expired / Lapsed
US
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Method of producing semiconductor device
Assignee: Toshiba Corp
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Filing: 1980-06-03
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Granted: 1982-06-15
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Expires: 2000-06-03
Abstract
Abstract Disclosed is a method of producing a semiconductor device, comprising the steps of (a) forming a first insulating layer consisting of a lower silicon oxide film and an upper slicon nitride film on the surface of a semiconductor substrate, (b) forming a second insulating layer consisting of silicon oxide on the first insulating layer, (c) forming a third insulating layer consisting of silicon nitride on the second insulating layer, (d) selectively removing the third insulating layer so as to form a mask used for forming a hole for an interconnection electrode, (e) etching away the exposed portion of the second insulating layer by using the mask so as to form the hole for the interconnection electrode, (f) forming a conductive material layer on the entire surface of the structure obtained by step (e), a contact hole formed in the first insulating layer after step (a) or (e) being filled with the conductive material so as to allow the conductive material layer disposed on the first insulating layer to be connected to the semiconductor substrate, and (g) removing the second insulating layer by etching so as to lift-off the third insulating layer and the conductive material layer laminated on the second insulating layer, the remaining conductive materal layer providing the interconnection electrode.
Inventors
- 👤 Masaharu Aoyama
- 👤 Jiro Ohshima
- 👤 Toshio Yonezawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 23:08
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10P; H10P76/00; H10P76/40; H10W20/01; H10W20/031; H10W20/056; H10W20/058; H10W20/063; H10W20/45; H10W20/47; H10W20/48; H10W74/00; H10W74/10; H10W74/131; H10W74/147
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
205 words
A method of producing a semiconductor device, comprising the steps of: (a) forming a first insulating layer comprising a lower silicon oxide film and an upper silicon nitride film on a surface of a semiconductor substrate; (b) forming a contact hole through said first insulating layer; (c) forming a second insulating layer consisting of silicon oxide on the first insulating layer; (d) forming a third insulating layer consisting of silicon nitride on the second insulating layer; (e) selectively removing the third insulating layer to form a mask used for forming a hole for an interconnection electrode; (f) etching away the exposed portion of the second insulating layer by using the mask to form the hole for the interconnection electrode; (g) forming a conductive material layer on the entire surface of the structure obtained by step (f), the contact hole formed in the first insulating layer being filled with the conductive material to allow the conductive material layer disposed on the first insulating layer to be connected to the semiconductor substrate; and (h) removing the second insulating layer by etching to lift-off the third insulating layer and the conductive material layer laminated on the second insulating layer, the remaining conductive material layer providing the interconnection electrode.
Claim 2
Independent Claim
205 words
A method of producing a semiconductor device, comprising the steps of: (a) forming a first insulating layer comprising a lower silicon oxide film and an upper silicon nitride film on a surface of a semiconductor substrate; (b) forming a contact hole through said first insulating layer; (c) forming a second insulating layer consisting of silicon oxide on the first insulating layer; (d) forming a third insulating layer consisting of silicon nitride on the second insulating layer; (e) selectively removing the third insulating layer to form a mask used for forming a hole for an interconnection electrode; (f) etching away the exposed portion of the second insulating layer by using the mask to form the hole for the interconnection electrode; (g) forming a conductive material layer on the entire surface of the structure obtained by step (f), the contact hole formed in the first insulating layer being filled with the conductive material to allow the conductive material layer disposed on the first insulating layer to be connected to the semiconductor substrate; and (h) removing the second insulating layer by etching to lift-off the third insulating layer and the conductive material layer laminated on the second insulating layer, the remaining conductive material layer providing the interconnection electrode.
Claim 3
Dependent Claim
36 words
The method according to claim 1 wherein the second insulating layer consists of a plurality of silicon oxide films differing from each other in impurity concentration such that the lower film exhibits the higher etching rate.
Claim 4
Dependent Claim
38 words
The method according to claim 1, wherein the conductive material layer is selected from the group consisting of an Al layer, an Al alloy layer, a polycrystalline silicon layer and a three-layer structure of Ti, Pt and Au.
Claim 5
Dependent Claim
29 words
The method according to claim 2, wherein the second insulating layer consists of a lower film of an impurity-doped silicon oxide and an upper film of undoped silicon oxide.
Claim 6
Independent Claim
204 words
A method of producing a semiconductor device comprising the steps of: (a) forming a first insulating layer comprising a lower silicon oxide film and an upper silicon nitride film on a surface of a semiconductor substrate; (b) forming a second insulating layer of silicon oxide on the first insulating layer; (c) forming a third insulating layer of silicon nitride on the second insulating layer; (d) selectively removing the third insulating layer to form a mask used for forming a hole used for an interconnection electrode; (e) etching away the exposed portion of the second insulating layer by using the mask to form the hole for the interconnection electrode; (f) forming a contact hole in the first insulating layer; (g) forming a conductive material layer on the entire surface of the structure obtained by step (f), the contact hole formed in the first insulating layer being filled with the conductive material so as to allow the conductive material there disposed on the first insulating layer to be connected to the semiconductor substrate; and (h) removing the second insulating layer by etching to lift-off the third insulating layer and the conductive material laminated on the second insulating layer, the remaining conductive material providing the interconnection electrode.
Claim 7
Independent Claim
204 words
A method of producing a semiconductor device comprising the steps of: (a) forming a first insulating layer comprising a lower silicon oxide film and an upper silicon nitride film on a surface of a semiconductor substrate; (b) forming a second insulating layer of silicon oxide on the first insulating layer; (c) forming a third insulating layer of silicon nitride on the second insulating layer; (d) selectively removing the third insulating layer to form a mask used for forming a hole used for an interconnection electrode; (e) etching away the exposed portion of the second insulating layer by using the mask to form the hole for the interconnection electrode; (f) forming a contact hole in the first insulating layer; (g) forming a conductive material layer on the entire surface of the structure obtained by step (f), the contact hole formed in the first insulating layer being filled with the conductive material so as to allow the conductive material there disposed on the first insulating layer to be connected to the semiconductor substrate; and (h) removing the second insulating layer by etching to lift-off the third insulating layer and the conductive material laminated on the second insulating layer, the remaining conductive material providing the interconnection electrode.
Claim 8
Dependent Claim
36 words
The method according to claim 5, wherein the second insulating layer consists of a plurality of silicon oxide films differing from each other in impurity concentration such that the lower film exhibits the higher etching rate.
Claim 9
Dependent Claim
38 words
The method according to claim 5, wherein the conductive material layer is selected from the group consisting of an Al layer, an Al alloy layer, a polycrystalline silicon layer and a three-layer structure of Ti, Pt and Au.
Claim 10
Dependent Claim
29 words
The method according to claim 6, wherein the second insulating layer consists of a lower film of an impurity-doped silicon oxide and an upper film of undoped silicon oxide.
Claim 11
Dependent Claim
42 words
The method according to claim 1, 2, 5, or 6 wherein the etching time of the second insulating layer is at least 1.5 times as long as that required for the etched portion to reach the bottom of the second insulating layer.
Claim 12
Dependent Claim
24 words
The method according to claim 2, 3, 6 or 8, wherein the impurity is at least one element selected from phosphorus, arsenic and boron.
Claim 13
Dependent Claim
49 words
The method according to claim 1, 2, 5 or 6 wherein a platinum silicide layer or a molybdenum silicide layer is formed on the surface of the semiconductor substrate exposed by the contact hole formed in the first insulating layer before the step of forming the conductive material layer.
Claim 14
Dependent Claim
34 words
The method according to claim 1, 2, 3, 5, 6 or 7 wherein the conductive material layer is covered with a metal layer resistant to the etchant used for etching the second insulating layer.
Claim 15
Dependent Claim
30 words
The method according to claim 12, wherein the metal layer covering the conductive material layer is formed of a metal selected from the group conprising Ti, Cr, Ni and Pt.
Claim 16
Independent Claim
252 words
A method of producing a semiconductor device, comprising the steps of: (a) forming a first insulating layer comprising a lower silicon oxide film and an upper silicon oxide nitride film on a surface of a semiconductor substrate, the thickness of the first insulating layer being in the range of 1,000 A to 1.5 thick; (b) forming a contact hole in the first insulating layer; (c) forming a second insulating layer of silicon oxide on the first insulating layer, the second insulating layer being in the range of 5,000 A to 1.5 thick; (d) forming a third insulating layer consisting of silicon nitride on the second insulating layer, the third insulating layer being in the range of 1,000 A to 2,000 A thick; (e) selectively removing the third insulating layer to form a mask used for forming a hole for an interconnection electrode; (f) etching away the exposed portion of the second insulating layer by using the mask to form the hole for the interconnection electrode; (g) forming a conductive material layer on the entire surface of the structure attained by step (f), the contact hole formed in the first insulating layer being filled with the conductive material to allow the conductive material layer disposed on the first insulating layer to be connected to the semiconductor substrate; and (h) removing the second insulating layer by etching to lift off the third insulating layer and the conducting material layer laminated on the second insulating layer, the remaining conductive material layer providing the interconnection electrode.
Claim 17
Independent Claim
252 words
A method of producing a semiconductor device, comprising the steps of: (a) forming a first insulating layer comprising a lower silicon oxide film and an upper silicon oxide nitride film on a surface of a semiconductor substrate, the thickness of the first insulating layer being in the range of 1,000 A to 1.5 thick; (b) forming a contact hole in the first insulating layer; (c) forming a second insulating layer of silicon oxide on the first insulating layer, the second insulating layer being in the range of 5,000 A to 1.5 thick; (d) forming a third insulating layer consisting of silicon nitride on the second insulating layer, the third insulating layer being in the range of 1,000 A to 2,000 A thick; (e) selectively removing the third insulating layer to form a mask used for forming a hole for an interconnection electrode; (f) etching away the exposed portion of the second insulating layer by using the mask to form the hole for the interconnection electrode; (g) forming a conductive material layer on the entire surface of the structure attained by step (f), the contact hole formed in the first insulating layer being filled with the conductive material to allow the conductive material layer disposed on the first insulating layer to be connected to the semiconductor substrate; and (h) removing the second insulating layer by etching to lift off the third insulating layer and the conducting material layer laminated on the second insulating layer, the remaining conductive material layer providing the interconnection electrode.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1985-06-14 | 1985-12-14 | 1986-06-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1989-06-14 | 1989-12-14 | 1990-06-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1993-06-14 | 1993-12-14 | 1994-06-15 | $7700.00 | Window Closed / Lapsed |