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US4329772A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for manufacturing a semiconductor device utilizing selective epitaxial growth and post heat treating

Assignee: Hitachi Ltd
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Filing: 1980-03-27
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Granted: 1982-05-18
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Expires: 2000-03-27
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Abstract

Abstract Disclosed is an improved method of growing an epitaxial layer preventing auto-doping from a doped region exposed to a surface of a semiconductor substrate. A surface of a semiconductor substrate of one conductivity type is covered with a mask having a predetermined opening. Then, impurity atoms are doped into the substrate through the opening to form a region of the other conductivity type. An epitaxial layer of one conductivity type is deposited over the exposed surface of the substrate with another mask which covers the entire surface of the region and has an area larger than that of the exposed surface of the region. The latter mask prevents auto-doping from the region of the other conductivity type. The process is usable for controlling, for example, channel widths of field effect semiconductor devices uniformly and precisely.

Inventors

  • 👤 Saburo Oikawa
  • 👤 Susumu Murakami
  • 👤 Yoshio Terasawa

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 07:06
CPC Classifications
H; H10; H10D; H10D12/00; H10D12/211; H10D12/212; H10D18/00; H10D18/60; H10D30/00; H10D30/80; H10D62/00; H10D62/10; H10D62/17; H10D62/343; H10P; H10P14/00; H10P14/20; H10P14/27; H10P14/271; H10P14/29; H10P14/2901; H10P14/2902; H10P14/2905; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; Y; Y10; Y10S; Y10S148/00; Y10S148/026; Y10S148/088

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 253 words
A method of making a semiconductor device comprising the steps of: preparing a semiconductor substrate having a main surface and a semiconductor layer therein of one conductivity type adjacent to said main surface; covering said main surface of said semiconductor substrate with a first mask having an opening which exposes a portion of said semiconductor layer; doping impurity atoms into said semiconductor layer through said opening of said first mask to make a first semiconductor region of another conductivity type opposite to said one conductivity type in said semiconductor layer; selectively covering the main surface of said semiconductor substrate with a second mask to cover the entire exposed surface of said first semiconductor region and an adjacent outer portion of the semiconductor layer provided in said main surface and to expose another portion of the semiconductor layer on the main surface whereby the another portion of the semiconductor layer is left uncovered; depositing a second semiconductor region of said one conductivity type epitaxially on the exposed portion of said semiconductor layer not covered with second mask; and heating said semiconductor substrate to cause diffusion of said impurity atoms outwardly from said first semiconductor region to enlarge said first semiconductor region into a portion of the semiconductor layer and into a portion of the second semiconductor region, the second mask preventing auto-doping of said impurity atoms from said first semiconductor region into said second semiconductor region during deposition of said second semiconductor region, and the width of the second semiconductor region being controllably reduced.
Claim 2
Independent Claim 253 words
A method of making a semiconductor device comprising the steps of: preparing a semiconductor substrate having a main surface and a semiconductor layer therein of one conductivity type adjacent to said main surface; covering said main surface of said semiconductor substrate with a first mask having an opening which exposes a portion of said semiconductor layer; doping impurity atoms into said semiconductor layer through said opening of said first mask to make a first semiconductor region of another conductivity type opposite to said one conductivity type in said semiconductor layer; selectively covering the main surface of said semiconductor substrate with a second mask to cover the entire exposed surface of said first semiconductor region and an adjacent outer portion of the semiconductor layer provided in said main surface and to expose another portion of the semiconductor layer on the main surface whereby the another portion of the semiconductor layer is left uncovered; depositing a second semiconductor region of said one conductivity type epitaxially on the exposed portion of said semiconductor layer not covered with second mask; and heating said semiconductor substrate to cause diffusion of said impurity atoms outwardly from said first semiconductor region to enlarge said first semiconductor region into a portion of the semiconductor layer and into a portion of the second semiconductor region, the second mask preventing auto-doping of said impurity atoms from said first semiconductor region into said second semiconductor region during deposition of said second semiconductor region, and the width of the second semiconductor region being controllably reduced.
Claim 3
Dependent Claim 37 words
A method as claimed in claim 1, wherein said second mask is made of silicon dioxide and said depositing step is carried out in a gaseous mixture containing a gaseous compound of said semiconductor and hydrogen chloride.
Claim 4
Independent Claim 304 words
A method making a Field Controlled Thyristor comprising the steps of: preparing a semiconductor substrate having a pair of opposing main surfaces and a stack structure of semiconductor areas therebetween which includes a first semiconductor area of one conductivity type adjacent to one of said main surfaces and a second semiconductor area of another conductivity type opposite to said one conductivity type adjacent to the other main surface of said first semiconductor area; covering said one of the main surfaces of said semiconductor substrate with a first mask having an opening which exposes a portion of said first semiconductor area; doping impurity atoms into said first semiconductor area through said opening of said first mask to make a first semiconductor region of said another conductivity type in said one semiconductor area; selectively covering said one of the main surfaces of said semiconductor substrate with a second mask to cover the entire exposed surface of said first semiconductor region and an adjacent outer portion of the first semiconductor area and to expose another portion of the first semiconductor area whereby the another portion of the first semiconductor area is left uncovered; depositing a second semiconductor region of said one conductivity type epitaxially on the exposed portion of said first semiconductor area not covered with said second mask to form a channel region of the Field Controlled Thyristor; and heating said semiconductor substrate to cause diffusion of said impurity atoms outwardly from said first semiconductor region to enlarge said first semiconductor region into a portion of the first semiconductor area and into a portion of the second semiconductor region, the second mask preventing auto-doping of said impurity atoms from said first semiconductor region into said second semiconductor region during deposition of said second semiconductor region, and the width of the second semiconductor region being controllably reduced.
Claim 5
Independent Claim 304 words
A method making a Field Controlled Thyristor comprising the steps of: preparing a semiconductor substrate having a pair of opposing main surfaces and a stack structure of semiconductor areas therebetween which includes a first semiconductor area of one conductivity type adjacent to one of said main surfaces and a second semiconductor area of another conductivity type opposite to said one conductivity type adjacent to the other main surface of said first semiconductor area; covering said one of the main surfaces of said semiconductor substrate with a first mask having an opening which exposes a portion of said first semiconductor area; doping impurity atoms into said first semiconductor area through said opening of said first mask to make a first semiconductor region of said another conductivity type in said one semiconductor area; selectively covering said one of the main surfaces of said semiconductor substrate with a second mask to cover the entire exposed surface of said first semiconductor region and an adjacent outer portion of the first semiconductor area and to expose another portion of the first semiconductor area whereby the another portion of the first semiconductor area is left uncovered; depositing a second semiconductor region of said one conductivity type epitaxially on the exposed portion of said first semiconductor area not covered with said second mask to form a channel region of the Field Controlled Thyristor; and heating said semiconductor substrate to cause diffusion of said impurity atoms outwardly from said first semiconductor region to enlarge said first semiconductor region into a portion of the first semiconductor area and into a portion of the second semiconductor region, the second mask preventing auto-doping of said impurity atoms from said first semiconductor region into said second semiconductor region during deposition of said second semiconductor region, and the width of the second semiconductor region being controllably reduced.
Claim 6
Dependent Claim 37 words
A method as claimed in claim 3, wherein said first semiconductor region has an impurity concentration of not more than 1×10 18 atoms/cm 3 in the portion enlarged within said second semiconductor region after said heating step.
Claim 7
Dependent Claim 27 words
A method as claimed in claim 3, wherein said width of said second semiconductor region is reduced to not more than 15 μm after said heating step.
Claim 8
Dependent Claim 17 words
A method as claimed in claim 3, wherein a plurality of said second semiconductor regions are formed.

References Cited (Backward Citations)

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US3716422A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1985-05-17 1985-11-16 1986-05-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1989-05-17 1989-11-16 1990-05-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1993-05-17 1993-11-16 1994-05-18 $7700.00 Window Closed / Lapsed

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