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US4225874A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor device having integrated diode

Assignee: RCA Corp
•
Filing: 1978-03-09
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Granted: 1980-09-30
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Expires: 1998-03-09
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Abstract

Abstract A semiconductor transistor device comprises a base region having a relatively thin portion with a thicker portion peripherally surrounding the relatively thin portion. A PN junction is between the base region and a collector region and includes at least one radius of curvature having the lowest breakdown voltage of the PN junction. An emitter region is in the thicker portion of the base region and an emitter electrode overlies the relatively thin portion.

Inventors

  • 👤 Ramon U. Martinelli

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 04:49
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/124; H10D62/125; H10D62/102; H10D62/103; H10D62/105; H10D62/108; H10D62/17; H10D62/177; H10D64/00; H10D64/20; H10D64/23; H10D64/231; H10D84/00; H10D84/101; H10D84/121

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 242 words
A semiconductor device comprising: a body of semiconductor material having first and second major opposing surfaces; a first region within said body having one type conductivity, said first region being adjacent said second surface; a second region within said body adjacent said first surface having a second type conductivity and forming a first PN junction with said first region at the interface therebetween, said first PN junction having a positionally dependent breakdown voltage associated therewith and having a point of lowest value of breakdown voltage therealong; said second region comprising a relatively thicker portion and a relatively thinner portion, said relatively thicker portion substantially completely peripherally surrounding said relatively thinner portion; said second region having a surface impurity concentration on the order of about 10 17 carriers/cm 3 , said relatively thicker portion extends to a depth of about 60 micrometers from said first surface; and said relatively thinner portion extending to a depth of about 30 micrometers from said first surface; a third region having said one type conductivity adjacent said first surface and extending into said second region, said third region forming a second PN junction with said second region at the interface therewith; said third region extending into said relatively thicker portion of said second region and substantially completely peripherally surrounding said relatively thinner portion; and a first electrode overlying and electrically contacting said third region and the portion of said second region overlying said point of lowest value.
Claim 2
Dependent Claim 242 words
A semiconductor device comprising: a body of semiconductor material having first and second major opposing surfaces; a first region within said body having one type conductivity, said first region being adjacent said second surface; a second region within said body adjacent said first surface having a second type conductivity and forming a first PN junction with said first region at the interface therebetween, said first PN junction having a positionally dependent breakdown voltage associated therewith and having a point of lowest value of breakdown voltage therealong; said second region comprising a relatively thicker portion and a relatively thinner portion, said relatively thicker portion substantially completely peripherally surrounding said relatively thinner portion; said second region having a surface impurity concentration on the order of about 10 17 carriers/cm 3 , said relatively thicker portion extends to a depth of about 60 micrometers from said first surface; and said relatively thinner portion extending to a depth of about 30 micrometers from said first surface; a third region having said one type conductivity adjacent said first surface and extending into said second region, said third region forming a second PN junction with said second region at the interface therewith; said third region extending into said relatively thicker portion of said second region and substantially completely peripherally surrounding said relatively thinner portion; and a first electrode overlying and electrically contacting said third region and the portion of said second region overlying said point of lowest value.
Claim 3
Dependent Claim 35 words
A semiconductor device as claimed in claim 1 further comprising: a second electrode overlying and electrically contacting said relatively thicker portion of said second region, said second electrode substantially completely peripherally enclosing said first electrode.
Claim 4
Dependent Claim 60 words
A semiconductor device as claimed in claim 1 wherein: said first PN-junction has a radius of curvature along said first PN-junction between said relatively thicker portion and said relatively thinner portion, said radius of curvature having a breakdown voltage associated therewith; said breakdown voltage associated with said radius of curvature having the lowest value of said positionally dependent breakdown voltage.
Claim 5
Dependent Claim 74 words
A semiconductor device as claimed in claim 1 wherein: said body having average impurity concentration on the order of about 10 14 carriers/cm 3 , is on the order of about 200 micrometers thick; and said first region having a high conductivity portion which has a surface impurity concentration on the order of about 5×10 20 carriers/cm 3 and extends into said body to a depth of about 60 micrometers from said second surface.
Claim 6
Dependent Claim 44 words
A semiconductor device as claimed in claim 4 wherein: said third region has a surface impurity concentration on the order of about 5×10 20 carriers/cm 3 and extends into said relatively thicker portion to a depth of about 20 micrometers from said first surface.
Claim 7
Dependent Claim 62 words
A semiconductor device as recited in claim 1 wherein: said device is a transistor; said first region is the collector of the transistor; said second region is the base of the transistor; said third region is the emitter of the transistor whereby said region of lowest value of breakdown voltage constitutes a diode connected between the collector and emitter of the transistor.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1983-09-30 1984-03-31 1984-09-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1987-09-30 1988-03-31 1988-09-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1991-09-30 1992-03-31 1992-09-30 $7700.00 Window Closed / Lapsed

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