US4017882A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Transistor having integrated protection
Assignee: RCA Corp
•
Filing: 1975-12-15
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Granted: 1977-04-12
•
Expires: 1995-12-15
Abstract
Abstract An integrated transistor device has reverse bias breakdown protection for both the base-collector PN junction and the base-emitter PN junction. The base-emitter PN junction is protected by means of a diode effectively in parallel relation therewith, and the base-collector PN junction is protected by means of a protective region which provides a punch-through mode of operation.
Inventors
- 👤 Peter Joseph Kannam
- 👤 Wilfred Potter Bennett
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 21:57
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/60; H10D84/611; H10D84/613; H10D84/617; H10D89/00; H10D89/60; Y; Y10; Y10S; Y10S257/00; Y10S257/913
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
102 words
An integrated transistor having a base region of a one type conductivity, a collector region of a second type conductivity adjacent to said base region and forming a base-collector PN junction at the interface therewith, an emitter region of said second type conductivity adjacent said base region and forming a base-emitter PN junction at the interface therewith, said transistor comprising: a first protective region having said second type conductivity contacting and surrounding said base region and forming a first PN junction therewith; and a second protective region having said one type conductivity adjacent said collector region and forming a PN diode therewith.
Claim 2
Dependent Claim
102 words
An integrated transistor having a base region of a one type conductivity, a collector region of a second type conductivity adjacent to said base region and forming a base-collector PN junction at the interface therewith, an emitter region of said second type conductivity adjacent said base region and forming a base-emitter PN junction at the interface therewith, said transistor comprising: a first protective region having said second type conductivity contacting and surrounding said base region and forming a first PN junction therewith; and a second protective region having said one type conductivity adjacent said collector region and forming a PN diode therewith.
Claim 3
Dependent Claim
37 words
An integrated transistor as claimed in claim 1 wherein: said PN diode is in parallel relation with said base-emitter PN junction, said diode being poled to be forward biased when said emitter PN junction is reverse biased.
Claim 4
Dependent Claim
48 words
An integrated transistor as claimed in claim 1 wherein: said first protective region has a doping profile and depth which is substantially the same as said emitter region; and said second protective region has a doping profile and depth which is substantially the same as said base region.
Claim 5
Dependent Claim
59 words
An integrated transistor as claimed in claim 1 wherein: said base region comprises a layer of comparatively low resistivity and a layer of comparatively high resistivity; said collector region comprises a layer of comparatively high resistivity and a layer of comparatively low resistivity; and said first protective region surrounds said layer of comparatively low resistivity of said base region.
Claim 6
Dependent Claim
46 words
An integrated transistor as claimed in claim 4 wherein: said first protective region and said layer of comparatively low resistivity of said base region have relative conductivities such that said first PN junction avalanches at a lower voltage than said base-collector PN junction of said device.
Claim 7
Dependent Claim
26 words
An integrated transistor as claimed in claim 1 wherein: said base region and said emitter region are annular and surround a core of said collector region.
Claim 8
Dependent Claim
17 words
An integrated transistor as claimed in claim 6 wherein: said second protective region is within said core.
Claim 9
Dependent Claim
18 words
An integrated transistor as claimed in claim 7 further comprising: base-collector PN junction protection means within said core.
References Cited (Backward Citations)
GB1073560A
Cited
US3677838A
Cited
US3633052A
Cited
US3758831A
Cited
US3881179A
Cited
US3921199A
Cited
US3936863A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1980-04-11 | 1980-10-11 | 1981-04-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1984-04-11 | 1984-10-11 | 1985-04-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1988-04-11 | 1988-10-11 | 1989-04-12 | $7700.00 | Window Closed / Lapsed |