P+ Buried layer for I2 L isolation by ion implantation

Claim 1

In a method of fabricating an integrated circuit the steps of: a. driving into first and second spaced apart regions in the surface of an N-type silicon body, an N conductivity dopant to create first and second N-type regions therein; b. driving into said surface a P-type dopant in selected areas to create a first P-type region entirely within said first N-type region and second and third spaced apart P-type regions entirely within said second N-type region; c. implanting a P-type dopant into said surface over an area which includes, and extends beyond all sides of, said first N doped region; d. growing an N-type epitaxial silicon layer on said surface, and auto-doping P-type dopant from said first, second and third P-type regions to form corresponding first, second and third buried P-type regions in said epitaxial layer; e. forming a mask, including a first oxide layer, over said epitaxial layer; f. removing portions of said epitaxial layer unprotected by said mask and the top layer of said body immediately underlying said portions so as to create first and second mesas based entirely within said first and second N-type regions and growing a second oxide layer over the sides of said mesas and over the surface of said body exposed by the removal of said top layer; and g. opening said first oxide layer over said mesas and driving P conductivity dopant into said epitaxial layer to form P-type vertical regions which extend down to said first, second and third buried P-type regions therein.