Data transmission system for transmitting primary and secondary intelligence

Claim 2

A data transmission system comprising: a transmitter portion including first means to convert groups of binary coded digital signals for transmission of primary information into groups of digital signals in a different coded form each element of which can assume any one of more than two values, the number of bits in said groups of binary coded signals and the number of bits in said groups of different coded form are such that for each one of said groups of binary coded signals there corresponds thereto n different code groups in said different coded form, where n is an integer greater than 1; and second means coupled to said first means to transmit secondary information in addition to said primary information in said different coded form represented by one of said groups of binary coded signals by selecting one of said n different code groups in said different coded form produced from said one of said groups of binary coded signals without said secondary information causing any interference with said primary information; and a receiver portion including third means coupled to said second means to convert said primary information in said different coded form and said secondary information in said different coded form into two groups of binary coded digital signals each representing a different one of said primary information and said secondary information.

Claim 3

A system according to claim 1, wherein said secondary information is a synchronization signal.

Claim 4

A system according to claim 1, wherein said third means includes fourth means to separate the respective code conditions from an incoming ternary code group, said code conditions being the value of each bit of said ternary code group, three shift registers one per code condition, each having a capacity for n bits, so that when said ternary code group has been received the contents of each of said three shift registers correspond to a different value of said bits of said ternary code group, a read only memory coupled to said three shift registers, said memory being used as a translation table for conversion to a binary representation, a primary information output from said memory at which said primary information appears, and a secondary information output from said memory by which said secondary information is coupled to a buffer store therefore.

Claim 5

A system according to claim 1, wherein said secondary information is a signalling signal.

Claim 6

A system according to claim 4, wherein said secondary information is a synchronization signal spaced from said signalling signal.

Claim 7

A system according to claim 1, wherein said groups of binary coded digital signals are pulse code modulation code groups each of which is converted into at least two code groups of said different coded form.

Claim 8

A system according to claim 6, wherein said different coded form is a ternary code.

Claim 9

A system according to claim 1, wherein said second means includes selection means coupled to said first means, said selection means being under control of said secondary information to select one of said n different code groups in said different coded form to be transmitted and to apply said selected one of said n different code groups in said different coded form to an output.

Claim 10

A system according to claim 8, wherein said third means includes fourth means to separate the respective code conditions from an incoming different code group in said different coded form, said code conditions being the value of each bit of said incoming different code group, three shift registers one per code condition, each having a capacity for n bits, so that when said different code group in said different coded form has been received the contents of each of said three shift registers corresponds to a different value of said bits of said different code group in said different coded form, a read only memory coupled to said three shift registers, said memory being used as a translation table for conversion to a binary representation, a primary information output from said memory at which said primary information appears, and a secondary information output from said memory by which said secondary information is coupled to a buffer store therefore.

Claim 11

A system according to claim 1, wherein said first means includes a shift register into which each of said groups of binary coded signals to be converted is sequentially inserted, and a first read only memory to effect the conversion coupled in parallel to said shift register, said first read only memory generating said n different code groups in said different coded form.

Claim 12

A system according to claim 10, wherein said second means includes selection means coupled to said first read only memory, said selection means being under control of said secondary information to select one of said n different code groups in said different coded form to be transmitted and to apply said selected one of said n different code groups in said different coded form to an output.

Claim 13

A system according to claim 11, wherein said third means includes fourth means to separate the respective code conditions from an incoming different code group in said different coded form, said code conditions being the value of each bit of said incoming different code group, three shift registers one per code condition, each having a capacity for n bits, so that when said different code group in said different coded form has been received the contents of each of said three shift registers corresponds to a different value of said bits of said different code group in said different coded form, a second read only memory coupled to said three shift registers, said second memory being used as a translation table for conversion to a binary representation, a primary information output from said second memory at which said primary information appears, and a secondary information output from said second memory by which said secondary information is coupled to a buffer store therefore.

Claim 14

A system according to claim 1, wherein said different coded form is a ternary code.

Claim 15

A system according to claim 13, wherein said third means includes fourth means to separate the respective code conditions from an incoming ternary code group, said code conditions being the value of each bit of said ternary code group, three shift registers one per code condition, each having a capacity for n bits, so that when said ternary code group has been received the contents of each of said three shift registers correspond to a different value of said bits of said ternary code group, a read only memory coupled to said three shift registers, said memory being used as a translation table for conversion to a binary representation, a primary information output from said memory at which said primary information appears, and a secondary information output from said memory by which said secondary information is coupled to a buffer store therefore.

Claim 16

A system according to claim 13, wherein said second means includes selection means coupled to said first means, said selection means being under the control of said secondary information to select one of said n different ternary groups to be transmitted and to apply said selected one of said n different ternary groups to an output.

Claim 17

A system according to claim 15, wherein said third means includes fourth means to separate the respective code conditions from an incoming ternary code group, said code conditions being the value of each bit of said ternary code group, three shift registers one per code condition, each having a capacity for n bits, so that when said ternary code group has been received the contents of each of said three shift registers correspond to a different value of said bits of said ternary code group, a read only memory coupled to said three shift registers, said memory being used as a translation table for conversion to a binary representation, a primary information output from said memory at which said primary information appears, and a secondary information output from said memory by which said secondary information is coupled to a buffer store therefore.

Claim 18

A system according to claim 13, wherein said first means includes a shift register into which each of said groups of binary coded signals to be converted is sequentially inserted, and a first read only memory to effect the conversion coupled in parallel to said shift register, said first read only memory generating said n different ternary groups.

Claim 19

A system according to claim 17, wherein said second means includes selection means coupled to said first read only memory, said selection means being under the control of said secondary information to select one of said n different ternary groups to be transmitted and to apply said selected one of said n different ternary groups to an output.

Claim 20

A system according to claim 18, wherein said third means includes fourth means to separate the respective code conditions from an incoming ternary code group, said code conditions being the value of each bit of said ternary code group, three shift registers one per code condition, each having a capacity for n bits, so that when said ternary code group has been received the contents of each of said three shift registers correspond to a different value of said bits of said ternary code group, a second read only memory coupled to said three shift registers, said second memory being used as a translation table for conversion to a binary representation, a primary information output from said second memory at which said primary information appears, and a secondary information output from said second memory by which said secondary information is coupled to a buffer store therefore.

Claim 21

A data transmission transmitter comprising: first means to convert groups of binary coded digital signals for transmission of primary information into groups of digital signals is a different coded form each element of which can assume any one of more than two values, the number of bits in said groups of binary coded signals and the number of bits in said groups of different coded form are such that for each one of said groups of binary coded signals there corresponds thereto n different code groups in said different coded form, where n is an integer greater than 1; and second means coupled to said first means to transmit secondary information in addition to said primary information in said different coded form represented by one of said groups of binary coded signals by selecting one of said n different code groups in said different coded form produced from said one of said groups of binary coded signals without said secondary information causing any interference with said primary information.

Claim 22

A data transmission transmitter comprising: first means to convert groups of binary coded digital signals for transmission of primary information into groups of digital signals is a different coded form each element of which can assume any one of more than two values, the number of bits in said groups of binary coded signals and the number of bits in said groups of different coded form are such that for each one of said groups of binary coded signals there corresponds thereto n different code groups in said different coded form, where n is an integer greater than 1; and second means coupled to said first means to transmit secondary information in addition to said primary information in said different coded form represented by one of said groups of binary coded signals by selecting one of said n different code groups in said different coded form produced from said one of said groups of binary coded signals without said secondary information causing any interference with said primary information.

Claim 23

A transmitter according to claim 20, wherein said secondary information is a synchronization signal.

Claim 24

A transmitter according to claim 20, wherein said second means includes selection means coupled to said first means, said selection means being under control of said secondary information to select one of said n different code groups in said different coded form to be transmitted and to apply said selected one of said n different code groups in said different coded form to an output.

Claim 25

A transmitter according to claim 20, wherein said secondary information is a signalling signal.

Claim 26

A transmitter according to claim 23, wherein said secondary information is a synchronization signal spaced from said signalling signal.

Claim 27

A transmitter according to claim 20, wherein said groups of binary coded digital signals are pulse code modulation code groups each of which is converted into at least two code groups of said different coded form.

Claim 28

A transmitter according to claim 25, wherein said different coded form is a ternary code.

Claim 29

A transmitter according to claim 20, wherein said first means includes a shift register into which each of said groups of binary coded signals to be converted is sequentially inserted, and a first read only memory to effect the conversion coupled in parallel to said shift register, said first read only memory generating said n different code groups in said different coded form.

Claim 30

A transmitter according to claim 27, wherein said second means includes selection means coupled to said first read only memory, said selection means being under control of said secondary information to select one of said n different code groups in said different coded form to be transmitted and to apply said selected one of said n different code groups in said different coded form to an output.

Claim 31

A transmitter according to claim 20, wherein said different coded form is a ternary code.

Claim 32

A transmitter according to claim 29, wherein said second means includes selection means coupled to said first means, said selection means being under the control of said secondary information to select one of said n different ternary groups to be transmitted and to apply said selected one of said n different ternary groups to an output.

Claim 33

A transmitter according to claim 29, wherein said first means includes a shift register into which each of said groups of binary coded signals to be converted is sequentially inserted, and a first read only memory to effect the conversion coupled in parallel to said shift register, said first read only memory generating said n different ternary groups.

Claim 34

A transmitter according to claim 31, wherein said second means includes selection means coupled to said first read only memory, said selection means being under the control of said secondary information to select one of said n different ternary groups to be transmitted and to apply said selected one of said n different ternary groups to an output.

Claim 35

A transmitter according to claim 32, wherein said third means inclues fourth means to separate the respective code conditions from an incoming ternary code group, said code conditions being the value of each bit of said ternary code group, three shift registers one per code condition, each having a capacity for n bits, so that when said ternary code group has been received the contents of each of said three shift registers correspond to a different value of said bits of said ternary code group, a second read only memory coupled to said three shift registers, said second memory being used as a translation table for conversion to a binary representation, a primary information output from said second memory at which said primary information appears, and a secondary information output from said second memory by which said secondary information is coupled to a buffer store therefore.

Claim 36

A data transmission receiver for receiving primary information in a coded form other than binary coded form each element of which can assume any one of more than two values and secondary information in said coded form other than binary coded form, said coded form other than binary coded form being derived by converting each group of binary coded digital signals for transmission of said primary information into n groups of digital signals in said coded form other than binary coded form with said secondary information being transmitted as a selected one of said n groups of said coded form other than binary, where n is an integer greater than 1, said receiver comprising first means to separate the respective code conditions from an incoming different code group in said different coded form, said code conditions being the value of each bit of said incoming different code group, three shift registers one per code condition, each having a capacity for n bits, so that when said different code group in said different coded form has been received the contents of said three shift registers corresponds to a different value of said bits of said different code group in said different coded form, a read only memory coupled to said three shift registers, said memory being used as a translation table for conversion to a binary representation, a primary information output from said memory at which said primary information appears, and a secondary information output from said memory by which said secondary information is coupled to a buffer store therefore.

Claim 37

A data transmission receiver for receiving primary information in a coded form other than binary coded form each element of which can assume any one of more than two values and secondary information in said coded form other than binary coded form, said coded form other than binary coded form being derived by converting each group of binary coded digital signals for transmission of said primary information into n groups of digital signals in said coded form other than binary coded form with said secondary information being transmitted as a selected one of said n groups of said coded form other than binary, where n is an integer greater than 1, said receiver comprising first means to separate the respective code conditions from an incoming different code group in said different coded form, said code conditions being the value of each bit of said incoming different code group, three shift registers one per code condition, each having a capacity for n bits, so that when said different code group in said different coded form has been received the contents of said three shift registers corresponds to a different value of said bits of said different code group in said different coded form, a read only memory coupled to said three shift registers, said memory being used as a translation table for conversion to a binary representation, a primary information output from said memory at which said primary information appears, and a secondary information output from said memory by which said secondary information is coupled to a buffer store therefore.

Claim 38

A receiver according to claim 34, wherein said different coded form is a ternary code.

Claim 41

A method according to claim 36, wherein said different coded form is a ternary code.