Fabrication method for a dual gate field-effect transistor

Claim 1

In a method for making a dual gate field effect transistor comprising the steps of: disposing a layer of a conductor adjacent a surface of an N+ layer of a semiconductor substrate; forming an aperture in the conductor; forming an aperture in the N+ layer congruent with the aperture in the conductor; forming a blind aperture in an N layer adjacent the N+ layer congruent with the aperture in the N+ layer; enlarging the aperture formed in the N+ and N layers whereby the conductor is cantilevered over the apertures in the N+ and N layers; forming two disjoined contacts from said conductor separated by the apertures; and disposing a Schottky metal adjacent a principal flat surface of the blind aperture in the N layer via the aperture defined by the conductor; the improvement comprising the steps of: disposing a layer of photoresist over the exposed surfaces of the disjoined contacts, the metal and the N+ and N layers; removing a portion of the photoresist to expose a central region of the Schottky metal located transversely between the disjoined contacts whereby each end region of the metal is located adjacent one of said disjoined contacts and remains covered with a continuously extending portion of said photoresist; removing the central region of the metal using said photoresist as a mask whereby two laterally spaced Schottky metal gates are formed; and removing the photoresist remaining.