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US3972754A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for forming dielectric isolation in integrated circuits

Assignee: International Business Machines Corp
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Filing: 1975-05-30
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Granted: 1976-08-03
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Expires: 1995-05-30
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Abstract

Abstract In the fabrication of integrated circuits, a method is provided for forming dielectrically isolated regions in the silicon substrate comprising selectively etching recesses in a silicon substrate and thermally oxidizing the recessed portions of the silicon substrate to form regions of recessed silicon dioxide extending into the substrate. Then, a blanket introduction of impurities of opposite-type conductivity is made into the portions of the substrate remaining unoxidized, after which a layer of silicon of said opposite-type conductivity is epitaxially deposited on the substrate surface. Next, utilizing appropriate silicon nitride masking, recesses are etched into the silicon epitaxial layer in registration with the now buried regions of recessed silicon dioxide in the substrate. Then, the recessed portions of the silicon epitaxial layer are thermally oxidized to the extent sufficient to form regions of recessed silicon dioxide extending through said epitaxial layer into registered contact respectively with the regions of recessed silicon dioxide formed in the substrate.

Inventors

  • 👤 Jacob Riseman

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 12:57
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/014; H10W10/0148; H10W10/10; H10W10/17; Y; Y10; Y10S; Y10S148/00; Y10S148/037; Y10S148/049; Y10S148/051; Y10S148/085; Y10S148/117; Y10S148/122

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 224 words
In the fabrication of integrated circuits, a method for forming dielectrically isolated regions in a silicon substrate comprising forming over a silicon substrate surface of one-type conductivity a first mask comprising silicon nitride having a plurality of openings therethrough, etching to recess the silicon substrate exposed in said plurality of openings, thermally oxidizing the recessed portions of the silicon substrate to form regions of recessed silicon dioxide extending into the substrate, removing said mask to expose the silicon substrate, carrying out a blanket introduction of impurities of opposite-type conductivity into the portions of the substrate surface remaining unoxidized to form regions which do not extend from the surface of said substrate to a substrate depth beyond that of the regions of recessed silicon dioxide, epitaxially depositing a layer of silicon of said opposite-type conductivity on said substrate surface, forming over said epitaxial layer a second mask comprising silicon nitride having a plurality of openings therethrough, in registration with said plurality of openings in said first mask, etching to recess the silicon epitaxial layer exposed in said plurality of openings in said second mask, and thermally oxidizing the recessed portions of said epitaxial layer to an extent sufficient to form regions of recessed silicon dioxide extending through said epitaxial layer into registered contact respectively with said regions of recessed silicon dioxide formed in the substrate.
Claim 2
Dependent Claim 224 words
In the fabrication of integrated circuits, a method for forming dielectrically isolated regions in a silicon substrate comprising forming over a silicon substrate surface of one-type conductivity a first mask comprising silicon nitride having a plurality of openings therethrough, etching to recess the silicon substrate exposed in said plurality of openings, thermally oxidizing the recessed portions of the silicon substrate to form regions of recessed silicon dioxide extending into the substrate, removing said mask to expose the silicon substrate, carrying out a blanket introduction of impurities of opposite-type conductivity into the portions of the substrate surface remaining unoxidized to form regions which do not extend from the surface of said substrate to a substrate depth beyond that of the regions of recessed silicon dioxide, epitaxially depositing a layer of silicon of said opposite-type conductivity on said substrate surface, forming over said epitaxial layer a second mask comprising silicon nitride having a plurality of openings therethrough, in registration with said plurality of openings in said first mask, etching to recess the silicon epitaxial layer exposed in said plurality of openings in said second mask, and thermally oxidizing the recessed portions of said epitaxial layer to an extent sufficient to form regions of recessed silicon dioxide extending through said epitaxial layer into registered contact respectively with said regions of recessed silicon dioxide formed in the substrate.
Claim 3
Dependent Claim 37 words
The method of claim 1 wherein said silicon nitride masks are composites which respectively comprise a lower layer of silicon dioxide in contact with said surface, and an upper layer of silicon nitride on said lower layer.
Claim 4
Dependent Claim 53 words
The method of claim 1 wherein said substrate is of a P-type conductivity with a maximum of conductivity-determining impurity concentration of 1 × 10.sup. 17 atoms/cm 3 , and the blanket introduced impurities are N-type and form N-type regions having a C 0 of at least 1 × 10.sup. 19 atoms/cm 3 .
Claim 5
Dependent Claim 17 words
The method of claim 3 wherein said blanket introduction of impurities is carried out by ion implantation.
Claim 6
Dependent Claim 16 words
The method of claim 3 wherein said blanket introduction of impurities is carried out by diffusion.
Claim 7
Dependent Claim 25 words
The method of claim 3 including the additional step of introducing P-type impurities into the etched recesses in the silicon substrate prior to thermal oxidation.

References Cited (Backward Citations)

US3379584A Cited
US3386865A Cited
US3481801A Cited
US3648125A Cited
US3796613A Cited
US3861968A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1979-08-03 1980-02-02 1980-08-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1983-08-03 1984-02-02 1984-08-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1987-08-03 1988-02-02 1988-08-03 $7700.00 Window Closed / Lapsed

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