US3969165A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Simplified method of transistor manufacture
Assignee: Motorola Solutions Inc
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Filing: 1975-06-02
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Granted: 1976-07-13
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Expires: 1995-06-02
Abstract
Abstract An improved method for the manufacture of semiconductor devices which shortens the processing steps leading to metallization is disclosed. The present invention utilizes a controlled silicon etch process which allows emitters to be diffused into both the emitter and base sites. Undesired emitters are then removed from the base sites prior to metallization which enables the semiconductor devices to be manufactured in fewer numbers of steps than that required by the prior art processing techniques. The invented method for forming a contactual region in a semiconductor substrate having a planar base region comprising the steps of forming at least one opening through an insulating layer on the substrate. Next, an impurity is diffused into the substrate through the opening to form a base region. A passivating layer is then disposed over the insulating layer and the opening. A pattern is etched through the passivating layer so as to expose a selected area in the base region of the substrate. A second impurity is now diffused into the base region through the pattern forming the emitter regions. Finally, undesired emitters are removed, and the device is ready for metallization.
Inventors
- 👤 William B. Henderson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 11:48
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/01; H10D10/051; H10D62/00; H10D62/10; H10D62/117; H10P; H10P50/00; H10P50/60; H10P50/64; H10P50/642; H10P50/644
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
130 words
A method for fabricating a semiconductor device having at least a first and a second active region comprising the steps of: a. forming a plurality of separate openings in an insulating layer disposed on a surface of said semiconductor, said semiconductor having a preferential conductivity type and determining said first active region; b. diffusing an impurity having an opposite conductivity type from that of said semiconductor through said plurality of separate openings in said insulating layer into separate upper regions in said semiconductor, said impurity determining a plurality of second active regions; and c. selectively removing some of said second active regions such that at least one of said second active regions remains whereby said first active region and said remaining second active regions are exposed through said insulating layer.
Claim 2
Independent Claim
130 words
A method for fabricating a semiconductor device having at least a first and a second active region comprising the steps of: a. forming a plurality of separate openings in an insulating layer disposed on a surface of said semiconductor, said semiconductor having a preferential conductivity type and determining said first active region; b. diffusing an impurity having an opposite conductivity type from that of said semiconductor through said plurality of separate openings in said insulating layer into separate upper regions in said semiconductor, said impurity determining a plurality of second active regions; and c. selectively removing some of said second active regions such that at least one of said second active regions remains whereby said first active region and said remaining second active regions are exposed through said insulating layer.
Claim 3
Dependent Claim
21 words
The method as defined in claim 1 wherein said second active regions have a depth of about 5,000 to 10,000 A.
Claim 4
Dependent Claim
47 words
The method of claim 1 wherein metal contacts are provided comprising the steps of: d. disposing a layer of metal over said insulating layer; and e. selectively removing said metal from the insualting layer, whereby said metal contacts are formed with said first and second active regions.
Claim 5
Dependent Claim
12 words
The method as defined in claim 3 wherein said metal is aluminum.
Claim 6
Dependent Claim
30 words
The method as defined in claim 1 wherein said device is heated to 930° to 1000°C for 10 to 30 minutes when said impurity is being diffused through said openings.
Claim 7
Independent Claim
119 words
A method for fabricating a semiconductor device having base, emitter, and collector regions comprising the steps of: a. forming at least one opening in an insulating layer disposed on a surface of said semiconductor; b. diffusing a first impurity into an upper region of said semiconductor through said opening whereby said base region is formed; c. forming a passivating layer over said insulating layer and said opening; d. defining a pattern through said passivating layer over said opening whereby said base region is exposed; e. diffusing a second impurity through said pattern into said base region said second impurity forming a plurality of emitter regions within said base region; and f. removing selected emitter regions from said base region.
Claim 8
Independent Claim
119 words
A method for fabricating a semiconductor device having base, emitter, and collector regions comprising the steps of: a. forming at least one opening in an insulating layer disposed on a surface of said semiconductor; b. diffusing a first impurity into an upper region of said semiconductor through said opening whereby said base region is formed; c. forming a passivating layer over said insulating layer and said opening; d. defining a pattern through said passivating layer over said opening whereby said base region is exposed; e. diffusing a second impurity through said pattern into said base region said second impurity forming a plurality of emitter regions within said base region; and f. removing selected emitter regions from said base region.
Claim 9
Dependent Claim
33 words
A method as defined in claim 6 wherein said base regions have a depth of about 3,000 to 10,000 A and said emitter regions have a depth of about 1,500 to 5,000 A.
Claim 10
Dependent Claim
19 words
The method as defined in claim 6 wherein said first impurity is phosporous and said second impurity is boron.
Claim 11
Dependent Claim
22 words
The method as defined in claim 6 wherein said selected emitter regions are removed from said base region by a chemical etchant.
Claim 12
Dependent Claim
50 words
A method as defined in claim 6 wherein metal contacts are provided comprising the steps of: g. disposing a layer of metal over said passivating layer; and h. selectively removing said metal from said passivating layer, whereby said metal contacts are formed with said emitter regions and said base regions.
Claim 13
Independent Claim
148 words
A method for fabricating a semiconductor device of a mesa type having base, emitter and collector regions comprising the steps of: a. diffusing first and second impurities into an upper region of said semiconductor; said first impurity forming said base region; said second impurity forming said emitter region; said second impurity diffused into said upper region of said semiconductor on top of said first impurity such that said first and second impurities are juxapositioned regions in said semiconductor; b. etching said semiconductor so as to form at least one mesa of said base and said emitter regions; c. removing undesired emitter regions such that said base region is exposed where said undesired emitter regions have been removed; d. forming a passivating layer over said base regions and said emitter regions; e. defining a pattern through said passivating layer whereby said base region and said emitter regions are exposed.
Claim 14
Independent Claim
148 words
A method for fabricating a semiconductor device of a mesa type having base, emitter and collector regions comprising the steps of: a. diffusing first and second impurities into an upper region of said semiconductor; said first impurity forming said base region; said second impurity forming said emitter region; said second impurity diffused into said upper region of said semiconductor on top of said first impurity such that said first and second impurities are juxapositioned regions in said semiconductor; b. etching said semiconductor so as to form at least one mesa of said base and said emitter regions; c. removing undesired emitter regions such that said base region is exposed where said undesired emitter regions have been removed; d. forming a passivating layer over said base regions and said emitter regions; e. defining a pattern through said passivating layer whereby said base region and said emitter regions are exposed.
Claim 15
Dependent Claim
14 words
The method as defined in claim 11 wherein said passivating layer is silicon dioxide.
Claim 16
Dependent Claim
20 words
The method as defined in claim 11 wherein metal contacts are disposed on said emitter regions and said base regions.
Claim 17
Independent Claim
135 words
A method for fabricating a semiconductor device having base, emitter, and collector regions comprising the steps of: a. forming at least one opening in an insulating layer disposed on a surface of said semiconductor; b. diffusing a first impurity into an upper region of said semiconductor through said opening whereby said base region is formed; c. forming a passivating layer over said insulating layer and said opening; d. defining a pattern through said passivating layer over said opening whereby said base region is exposed; e. diffusing a second impurity through said pattern into said base region, said second impurity forming a plurality of emitter regions within said base region; and f. defining a pattern through said passivating layer such that selected emitters and a predetermined area of said base surrounding said selected emitter is exposed.
Claim 18
Independent Claim
135 words
A method for fabricating a semiconductor device having base, emitter, and collector regions comprising the steps of: a. forming at least one opening in an insulating layer disposed on a surface of said semiconductor; b. diffusing a first impurity into an upper region of said semiconductor through said opening whereby said base region is formed; c. forming a passivating layer over said insulating layer and said opening; d. defining a pattern through said passivating layer over said opening whereby said base region is exposed; e. diffusing a second impurity through said pattern into said base region, said second impurity forming a plurality of emitter regions within said base region; and f. defining a pattern through said passivating layer such that selected emitters and a predetermined area of said base surrounding said selected emitter is exposed.
Claim 19
Dependent Claim
34 words
The method as defined in claim 14 wherein metal contacts are disposed on said selected emitters and said predetermined area of said base surrounding said selected emitters whereby base contact sites are thus formed.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1979-07-13 | 1980-01-12 | 1980-07-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1983-07-13 | 1984-01-12 | 1984-07-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1987-07-13 | 1988-01-12 | 1988-07-13 | $7700.00 | Window Closed / Lapsed |