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US3945028A Expired / Lapsed US ⏱️ 0.0 years remaining

High speed, high power plasma thyristor circuit

Assignee: Westinghouse Electric Corp
•
Filing: 1973-04-26
•
Granted: 1976-03-16
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Expires: 1993-04-26
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Abstract

Abstract A plasma thyristor circuit is provided for generating high power, ultra-short duration electrical signals. A silicon semiconductor body has first, second and third impurity regions therein with a PN junction formed at the transition between the first and second or the second and third impurity regions. The second impurity region has an impurity concentration of less than about 5 × 10 14 atoms/cm 3 , and a width of greater than about 80 microns. The ratio of the punch-through voltage of the second impurity region to the reverse breakdown voltage of the PN junction is between 0.3 and 0.7. Power sources apply both a reverse bias voltage across the body greater than said punch-through voltage and less than said reverse breakdown voltage, and a current to the body having a density greater than the saturation current density of the second impurity region.

Inventors

  • 👤 Surinder Krishna
  • 👤 Chang Kwei Chu

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 12:26
CPC Classifications
H; H10; H10D; H10D8/00; G; G01; G01S; G01S7/00; G01S7/02; G01S7/28; G01S7/282

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 216 words
A high speed, high power plasma thyristor circuit comprising: a. a silicon semiconductor body having opposed major surfaces and having first, second and third impurity regions therein; said first and third impurity regions each adjoining a major surface and having opposite conductivity-type; said second impurity region being within the body between said first and third impurity regions and having a width of at least 80 microns and an impurity concentration therethrough of less than about 5 × 10 14 atoms/cm 3 ; and a PN junction being in the body at a transition between said regions, and having a reverse breakdown voltage between about 1.4 and 3.3 times greater than the punch-through voltage of the second impurity region; b. electrical contacts affixed to the major surfaces to make ohmic contact with said first and third impurity regions; c. a bias power source electrically connected to the electrical contacts and capable of applying a reverse bias voltage across the body greater than the punch-through voltage of said second impurity region but less than the reverse breakdown voltage of the PN junction; and d. a control power source electrically connected to the electrical contacts and capable of causing a current pulse through the body having a density greater than the saturation current density of the second impurity region.
Claim 2
Dependent Claim 216 words
A high speed, high power plasma thyristor circuit comprising: a. a silicon semiconductor body having opposed major surfaces and having first, second and third impurity regions therein; said first and third impurity regions each adjoining a major surface and having opposite conductivity-type; said second impurity region being within the body between said first and third impurity regions and having a width of at least 80 microns and an impurity concentration therethrough of less than about 5 × 10 14 atoms/cm 3 ; and a PN junction being in the body at a transition between said regions, and having a reverse breakdown voltage between about 1.4 and 3.3 times greater than the punch-through voltage of the second impurity region; b. electrical contacts affixed to the major surfaces to make ohmic contact with said first and third impurity regions; c. a bias power source electrically connected to the electrical contacts and capable of applying a reverse bias voltage across the body greater than the punch-through voltage of said second impurity region but less than the reverse breakdown voltage of the PN junction; and d. a control power source electrically connected to the electrical contacts and capable of causing a current pulse through the body having a density greater than the saturation current density of the second impurity region.
Claim 3
Dependent Claim 36 words
A high speed, high power plasma thyristor circuit as set forth in claim 1 wherein: the impurity concentration gradients at the transition from the first and third impurity regions to the second impurity region are steep.
Claim 4
Dependent Claim 49 words
A high speed, high power plasma thyristor circuit as set forth in claim 1 comprising in addition: e. a matching circuit for processing output signals from the body electrically connected to the electrical contacts and having high "Q" impedance for balancing impedances of the output signal from the body.
Claim 5
Dependent Claim 27 words
A high speed, high power plasma thyristor circuit as set forth in claim 1 wherein: said second impurity region has a width of at least 150 microns.

References Cited (Backward Citations)

US2997604A Cited
US2980832A Cited
US3320550A Cited
US3439239A Cited
US3391287A Cited
US3544855A Cited
US3584270A Cited
US3624557A Cited
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US3829880A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1979-03-16 1979-09-15 1980-03-16 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1983-03-16 1983-09-15 1984-03-16 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1987-03-16 1987-09-15 1988-03-16 $7700.00 Window Closed / Lapsed

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