Digital synchronizing system

Claim 2

A synchronizing system comprising: a first source of synchronizing pulses subject to degradation; a second source of synchronizing pulses for providing pulses in a particular multiple of the frequency of occurrence of pulses from said first source of pulses; resettable counting means coupled to said second source of synchronizing pulses for counting said multiple of synchronizing pulses provided by said second source of synchronizing pulses and for producing signals representative of counting first, second and third number of pulses from said second source of synchronizing pulses; resetting means coupled to said resettable counting means and to said first source of synchronizing pulses for resetting said resettable counting means upon the occurrence of said second number of pulses from said second source of synchronizing pulses or upon the occurrence of a pulse from said first source of synchronizing pulses; enabling means coupled to said resettable counting means for producing an enabling signal during the interval between said first number and said third number of pulses of said resettable counting means; and coincidence gating means coupled to said enabling means and to said first source of synchronizing pulses for allowing pulses from said first source of synchronizing pulses to pass through saiD synchronizing system during the incidence of said enabling signal.

Claim 3

A synchronizing system according to claim 1 wherein: said resetting means is an or gate.

Claim 4

A synchronizing system according to claim 1 wherein: said enabling means is a flip-flop.

Claim 5

A synchronizing system according to claim 1 wherein: said enabling means is a monostable multivibrator.

Claim 6

A synchronizing system according to claim 1 wherein: said resettable counting means comprises a plurality of serially coupled flip-flops having common reset lines for being reset simultaneously when energized from said resetting means and having output terminals of flip-flops representing said first and second numbers of pulses coupled to input terminals of coincidence gates for passing through said coincidence gates pulses representative of the counting of said first and second numbers of pulses.

Claim 7

In a television receiver, a digital deflection synchronizing system comprising: a deflection circuit for producing deflection scanning current; a deflection winding coupled to said deflection circuit for receiving scanning current therefrom; a source of clock synchronizing pulses; a source of deflection rate synchronizing pulses; resettable counting means coupled to said source of clock synchronizing pulses for counting said clock synchronizing pulses and for producing signals representative of counting first, second and third numbers of pulses from said source of clock synchronizing pulses; resetting means coupled to said resettable counting means and to said source of deflection rate synchronizing pulses for resetting said resettable counting means upon the occurrence of said second number of pulses from said source of clock synchronizing pulses or pulses from said source of deflection rate synchronizing pulses; enabling means coupled to said resettable counting means for producing an enabling signal during a time interval between said first and third number of pulses; and coincidence gating means coupled to said enabling means, to said source of deflection rate synchronizing pulses and to said deflection circuit for allowing pulses from said source of deflection rate synchronizing pulses to pass through said deflection synchronizing system and to synchronize said deflection circuit during said time interval thereby making said deflection circuit immune from being controlled by pulses occurring in said source of deflection rate synchronizing pulses at any time other than during said time interval after the occurrence of said first number of pulses.

Claim 8

In a television receiver, a digital deflection synchronizing system comprising: a deflection circuit for producing deflection scanning current; a deflection winding coupled to said deflection circuit for receiving scanning current therefrom; a source of clock synchronizing pulses; a source of deflection rate synchronizing pulses; resettable counting means coupled to said source of clock synchronizing pulses for counting said clock synchronizing pulses and for producing signals representative of counting first, second and third numbers of pulses from said source of clock synchronizing pulses; resetting means coupled to said resettable counting means and to said source of deflection rate synchronizing pulses for resetting said resettable counting means upon the occurrence of said second number of pulses from said source of clock synchronizing pulses or pulses from said source of deflection rate synchronizing pulses; enabling means coupled to said resettable counting means for producing an enabling signal during a time interval between said first and third number of pulses; and coincidence gating means coupled to said enabling means, to said source of deflection rate synchronizing pulses and to said deflection circuit for allowing pulses from said source of deflection rate synchronizing pulses to pass through said deflection synchronizing system and to synchronize said deflection circuit during said time interval thereby making said deflection circuit immune from being controlled by pulses occurring in said source of deflection rate synchronizing pulses at any time other than during said time interval after the occurrence of said first number of pulses.

Claim 9

A digital deflection synchronizing system according to claim 6 wherein: said source of clock synchronizing pulses is a frequency doubler coupled between a television receiver horizontal oscillator and said resettable counting means for doubling the frequency of pulses produced in said horizontal oscillator and for passing pulses at twice the horizontal oscillator frequency to said resettable counting means to be counted.

Claim 10

A digital deflection synchronizing system according to claim 6 wherein: said resettable counting means comprises a plurality of serially coupled flip-flops having common reset lines for being reset simultaneously when energized from said resetting means and having output terminals of flip-flops representing said first and second numbers of pulses coupled to input terminals of coincidence gates for passing through said coincidence gates pulses representative of the counting of said first and second numbers of pulses.

Claim 11

A digital deflection synchronizing system according to claim 6 wherein: said resetting means is an or gate.

Claim 12

A digital deflection synchronizing system according to claim 6 wherein: said enabling means is a flip-flop.

Claim 13

A digital deflection synchronizing system according to claim 6 wherein: said enabling means is a monostable multivibrator.

Claim 14

A digital deflection system according to claim 6 wherein: an intErnal vertical synchronization system comprising an or gate and a second resettable counting means, said second resettable counting means being coupled to said source of clock synchronizing pulses for counting said clock synchronizing pulses and for producing at an output terminal a signal representative of counting said second number of pulses from said source of clock synchronizing pulses; said output terminal of said resettable counting means being coupled to an input terminal of said or gate and an input terminal of said coincidence gating means being coupled to a second input terminal of said or gate; and said or gate having an output terminal coupled to a resetting terminal of said second resettable counting means and to said deflection circuit for allowing pulses from said source of deflection synchronizing pulses which pass through said coincidence gating means to reset said second resettable counting means and synchronize said deflection circuit and for allowing pulses from said second resettable counting means to reset said second resettable counting means and synchronize said deflection circuit in the absence of said deflection synchronizing pulses.

Claim 15

A synchronizing system comprising: a first source of synchronizing pulses subject to degradation; a second source of synchronizing pulses occurring at a multiple of the frequency of said pulses from said first source; resettable counting means coupled to said second source for producing first, second and third signals upon counting first, second and third numbers of pulses respectively from said second source; enabling means coupled to said resettable counting means and to said first source of synchronizing pulses for being enabled by said first signal from said resettable counting means for passing pulses from said first source occurring during a predetermined time interval after said first signal enables said enabling means and for being disabled by the occurrence of said third signal marking the end of said predetermined time interval; and means coupled to said resettable counting means and to said first source of synchronizing pulses for resetting said resettable counting means upon the occurrence of said second number of pulses from said resettable counting means or upon the occurrence of a pulse from said first source of synchronizing pulses.

Claim 16

A synchronizing system comprising: a first source of synchronizing pulses subject to degradation; a second source of synchronizing pulses occurring at a multiple of the frequency of said pulses from said first source; resettable counting means coupled to said second source for producing first, second and third signals upon counting first, second and third numbers of pulses respectively from said second source; enabling means coupled to said resettable counting means and to said first source of synchronizing pulses for being enabled by said first signal from said resettable counting means for passing pulses from said first source occurring during a predetermined time interval after said first signal enables said enabling means and for being disabled by the occurrence of said third signal marking the end of said predetermined time interval; and means coupled to said resettable counting means and to said first source of synchronizing pulses for resetting said resettable counting means upon the occurrence of said second number of pulses from said resettable counting means or upon the occurrence of a pulse from said first source of synchronizing pulses.