Patent US3856587A successfully refreshed from Google Patents.
US3856587A
Expired / Lapsed
US
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Method of fabricating semiconductor memory device gate
Assignee: TDK Corp
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Filing: 1972-03-20
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Granted: 1974-12-24
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Expires: 1992-03-20
Abstract
Abstract Method of fabricating an insulating coating to be formed on a semiconductor substrate for a semiconductor device providing memory capability by controlling the existence, polarity and amount of charge to be trapped into the insulating coating.
Inventors
- 👤 S Yamazaki
- 👤 I Kagawa
- 👤 H Ohwada
- 👤 Y Sugimura
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 19:02
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/68; H10D30/6891; H10D30/6893; B; B82; B82Y; B82Y10/00; H10D30/681; H10D30/683; H10D99/00; H10W; H10W74/00; H10W74/40; H10W74/43; Y; Y10; Y10S; Y10S148/00; Y10S148/043; Y10S148/113; Y10S148/114; Y10S148/122; Y10S438/00; Y10S438/903; Y10S438/91; Y10T; Y10T428/00; Y10T428/26
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
82 words
THE METHOD OF FABRICATING THE GATE OF A SEMICONDUCTOR MEMORY DEVICE, WHICH COMPRISES DEPOSITING A THIN INSULATING COATING IN AT LEAST A MONO-LAYER ON A SURFACE OF A SEMICONDUCTOR SUBSTRATE, FORMING A SEMICONDUCTOR CLUSTER OR A THIN FLIM MADE OF SILICON OR GERMANIUM ON THE THIN INSULATING COATING, AND FORMING A SILICON NITRIDE COATING ON THE TOP OF THE CLUSTER OR THIN FILM, THEREBY FORMING MEMORY CAPABILITY CONTROLLING THE EXTIENCE, POLARITY AND AMOUNT OF CHARGE TO BE TRAPPED INTO THE INSULATING COATING.
Claim 2
Independent Claim
82 words
THE METHOD OF FABRICATING THE GATE OF A SEMICONDUCTOR MEMORY DEVICE, WHICH COMPRISES DEPOSITING A THIN INSULATING COATING IN AT LEAST A MONO-LAYER ON A SURFACE OF A SEMICONDUCTOR SUBSTRATE, FORMING A SEMICONDUCTOR CLUSTER OR A THIN FLIM MADE OF SILICON OR GERMANIUM ON THE THIN INSULATING COATING, AND FORMING A SILICON NITRIDE COATING ON THE TOP OF THE CLUSTER OR THIN FILM, THEREBY FORMING MEMORY CAPABILITY CONTROLLING THE EXTIENCE, POLARITY AND AMOUNT OF CHARGE TO BE TRAPPED INTO THE INSULATING COATING.
Claim 3
Dependent Claim
23 words
The method as in claim 1, wherein the cluster or thin film of silicon is made from silane, dichlorosilane, trichlorosilane or silicon tetrachloride.
Claim 4
Dependent Claim
21 words
The method as in claim 1, wherein the cluster or thin film of germanium is made from germane or germanium halide.
Claim 5
Dependent Claim
101 words
In a method of fabricating the gate of a semiconductor device having memory capability controlling the existence, polarity and amount of charge to be trapped into an insulating coating of the semiconductor device, the improvement comprising fabricating the insulating coating by depositing a thin insulating coating in at least a mono-layer on a surface of a substrate of the semiconductor device, and forming simultaneously a silicon cluster on said thin insulating coating and a silicon nitride coating on said silicon cluster by a surface reaction between a nitriding vapor and a silicide vapor involving said silicon cluster or a cluster source.
Claim 6
Dependent Claim
101 words
In a method of fabricating the gate of a semiconductor device having memory capability controlling the existence, polarity and amount of charge to be trapped into an insulating coating of the semiconductor device, the improvement comprising fabricating the insulating coating by depositing a thin insulating coating in at least a mono-layer on a surface of a substrate of the semiconductor device, and forming simultaneously a silicon cluster on said thin insulating coating and a silicon nitride coating on said silicon cluster by a surface reaction between a nitriding vapor and a silicide vapor involving said silicon cluster or a cluster source.
Claim 7
Dependent Claim
19 words
The method as in claim 4, wherein the thin insulating coating is made of silicon oxide or silicon nitride.
Claim 8
Dependent Claim
19 words
The method as in claim 5, wherein the thin silcon oxide coating has a thickness of less than 200A.
Claim 9
Dependent Claim
37 words
The method as in claim 6, wherein the thin silicon oxide coating is formed by oxidizing a surface of silicon semiconductor substrate using carbon dioxide or carbon monoxide diluted with hydrogen or nitrogen at 900*C to 1,150*C.
Claim 10
Dependent Claim
28 words
The method as in claim 4 wherein said silicide vapor is selected from the group consisting of silane, dichlorosilane, trichlorosilane, silicon tetrachloride and an organic compound of silane.
Claim 11
Dependent Claim
13 words
The method as in claim 8, wherein said silane is diluted with helium.
Claim 12
Dependent Claim
18 words
The method as in claim 8, wherein said silicide vapor is diluted with a carrier gas comprising helium.
Claim 13
Dependent Claim
20 words
The method as in claim 4, wherein the said silicon nitride coating has no cluster or has very few clusters.
Claim 14
Dependent Claim
28 words
The method as in claim 11, wherein the said silicon nitride coating is synthesized by reacting silane diluted with hydrogen and ammonia in the presence of a catalyst.
Claim 15
Dependent Claim
25 words
The method as in claim 4, wherein the nitriding vapor to be used for the synthesis of the silicon nitride coating comprises ammonia or hydrazine.
Claim 16
Dependent Claim
25 words
The method as in claim 4, wherein a catalyst is used for the synthesis of the silicon nitride coating to activate or decompose reactive vapor.
Claim 17
Dependent Claim
19 words
The method as in claim 14 wherein the catalyst is nickel oxide, iron oxide, platinum, copper-zinc or reduced nickel.
Claim 18
Dependent Claim
18 words
The method as in claim 15, wherein the catalyst is used at the range of 90*C to 450*C.
Claim 19
Dependent Claim
17 words
The method as in claim 14, wherein the said semiconductor substrate is silicon, germanium or gallium arsenide.
Claim 20
Dependent Claim
22 words
The method as in claim 4, wherein said cluster and silicon nitride coating on said cluster are synthesized using chemical vapor deposition.
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-12-23 | 1978-06-24 | 1978-12-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-12-23 | 1982-06-24 | 1982-12-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-12-23 | 1986-06-24 | 1986-12-24 | $7700.00 | Window Closed / Lapsed |