Doped semiconductor electrodes for mos type devices

Claim 1

In a self-aligned gate MOS device containing source and drain regions of one conductivity type in a silicon substrate of the opposite conductivity type and with a silicon gate electrode overlying but separated from the channel region between the source and drain regions by an insulating layer of oxide, the improvement which comprises: the gate electrode being selectively-doped with impurities of the same conductivity type as the substrate and to a level of 10 17-1019 atoms/cc and being amorphous semiconductor material grown on said silicon oxide from the thermal decomposition of silane in a hydrogen atmosphere at a temperature between 630* and 680* C.