Universal logical integrated circuit

Claim 2

A universal logical integrated circuit comprising: means for receiving a plurality of input variables; a plurality of digit lines arranged in parallel with each other, each digit line comprising a pair of digit lines driven by the normal and inverted values of the input variables; drive means for driving the digit lines by said input variables from said input means; a plurality of word lines arranged crossing said digit lines, each of said word lines comprising a pair of word lines per word; output means for logically combining the outputs of said word lines; digit fixed memory means on which memory contents can be programmed, said digit fixed memory means being installed at the cross-points of said digit lines and said word lines, and comprising elements which are programmable by applying radiant ray energy to the elements, including a transistor with its collector grounded, and four junction parts which are connected between said digit line pair and the base of the transistor and between said word line pair and the emitter of the transistor and which can be disconnected by a program; and means for programming the memory contents of said digit fixed memory means, comprising means for applying radiant rays to said elements.

Claim 3

A universal logical integrated circuit comprising: first means for receiving a plurality of input signals which are to be subjected to a prescribed logic operation; second means, coupled to said first means, for effecting a selected operation of said input signals, said second means comprising a multiplicity of prescribed circuits, each circuit having a predetermined configuration and containing at least two individual components, the electrical characteristics of which are variable, so that each circuit element may have its components programmed to have preselected electrical characteristics, and wherein said second means further comprises a plurality of pairs of digit lines connected to said first means, to which said input signals and signals corresponding to the inverse polarity thereof are applied, a plurality of pairs of output word lines crossing said pairs of input lines and respective prescribed circuits each having a pair of input terminals connected to said digit lines and a pair of output terminals connected to said output word lines, with said individual components being Disposed in the electrical circuit paths between said digit lines of each respective pair of digit lines and the output word lines of each respective pair of output word lines; and third means, coupled to said second means, for providing an output signal representative of the results of said prescribed logic operation on input signals applied to said first means, whereby, in response to the application of a programmed stimulus being applied to components included within the circuits of said second means, input signals applied to said first means will be logically combined in said second means in accordance with a prescribed operation determined by the electrical characteristics of the components of the circuits of said second means, to provide said output signal from said third means, and wherein said second means further comprises a plurality of logical coupling circuits each having a pair of inputs connected to respective pairs of said output word lines and an output connected to said third means, and further having an individual circuit component, the electrical characteristics of which are variable, connected to one of the inputs thereof.

Claim 4

A universal logical integrated circuit comprising: first means for receiving a plurality of input signals which are to be subjected to a prescribed logic operation; second means, coupled to said first means, for effecting a selected operation of said input signals, said second means comprising a multiplicity of prescribed circuits, each circuit having a predetermined configuration and containing at least two individual components, the electrical characteristics of which are variable, so that each circuit element may have its components programmed to have preselected electrical characteristics, and wherein said second means further comprises a plurality of pairs of digit lines connected to said first means, to which said input signals and signals corresponding to the inverse polarity thereof are applied, a plurality of pairs of output word lines crossing said pairs of input lines and respective prescribed circuits each having a pair of input terminals connected to said digit lines and a pair of output terminals connected to said output word lines, with said individual components being Disposed in the electrical circuit paths between said digit lines of each respective pair of digit lines and the output word lines of each respective pair of output word lines; and third means, coupled to said second means, for providing an output signal representative of the results of said prescribed logic operation on input signals applied to said first means, whereby, in response to the application of a programmed stimulus being applied to components included within the circuits of said second means, input signals applied to said first means will be logically combined in said second means in accordance with a prescribed operation determined by the electrical characteristics of the components of the circuits of said second means, to provide said output signal from said third means, and wherein said second means further comprises a plurality of logical coupling circuits each having a pair of inputs connected to respective pairs of said output word lines and an output connected to said third means, and further having an individual circuit component, the electrical characteristics of which are variable, connected to one of the inputs thereof.

Claim 5

A universal logical integrated circuit comprising: first means for receiving a plurality of input signals which are to be subjected to a prescribed logic operation; second means coupled to said first means, for effecting a selected logic operation on said input signals, said second means comprising a multiplicity of prescribed circuits, each circuit having a predetermined configuration and containing at least two individual components, the electrical characteristics of which are variable, so that each circuit element may have its components programmed to have preselected electrical characteristics, wherein said second means further comprises a plurality of pairs of digit lines connected to said first means, to which said input signals and signals corresponding to the inverse polarity thereof are applied, a plurality of pairs of output word lines crossing said pairs of input lines and respective prescribed circuits each having a pair of input terminals connected to said digit lines and a pair of output terminals connected to said output word lines, with said individual components being disposed in the electrical circuit paths between said digit lines of each respective pair of digit lines and the output word lines of each respective pair of output word lines, and wherein each prescribed circuit comprises first and second individual components, the electrical characteristics of which are variable, respectively connected to a pair of said digit lines, and third and fourth individual components, the electrical characteristics of which are variable, respectively connected to a pair of said output word lines, and a semiconductor switching element having an input electrode, an output electrode and a control electrode, said control electrode being connected to said first and second individual components, one of said input and output electrodes being connected to said third and fourth individual components, and the other of said input and output electrodes being connected to a reference potential input; and third means, coupled to said second means, for providing an output signal representative of the result of said prescribed logic operation on input signals applied to said first means, whereby, in response to the application of a programmed stimulus being applied to components included within the circuits of said second means, input signals applied to said first means will be logically combined in said second means in accordance with a prescribed operation determined by the electrical characteristics of the components of the circuits of said second means, to provide said output signal form said third means.

Claim 6

A universal logical integrated circuit comprising: first means for receiving a plurality of input signals which are to be subjected to a prescribed logic operation; second means coupled to said first means, for effecting a selected logic operation on said input signals, said second means comprising a multiplicity of prescribed circuits, each circuit having a predetermined configuration and containing at least two individual components, the electrical characteristics of which are variable, so that each circuit element may have its components programmed to have preselected electrical characteristics, wherein said second means further comprises a plurality of pairs of digit lines connected to said first means, to which said input signals and signals corresponding to the inverse polarity thereof are applied, a plurality of pairs of output word lines crossing said pairs of input lines and respective prescribed circuits each having a pair of input terminals connected to said digit lines and a pair of output terminals connected to said output word lines, with said individual components being disposed in the electrical circuit paths between said digit lines of each respective pair of digit lines and the output word lines of each respective pair of output word lines, and wherein each prescribed circuit comprises first and second individual components, the electrical characteristics of which are variable, respectively connected to a pair of said digit lines, and third and fourth individual components, the electrical characteristics of which are variable, respectively connected to a pair of said output word lines, and a semiconductor switching element having an input electrode, an output electrode and a control electrode, said control electrode being connected to said first and second individual components, one of said input and output electrodes being connected to said third and fourth individual components, and the other of said input and output electrodes being connected to a reference potential input; and third means, coupled to said second means, for providing an output signal representative of the result of said prescribed logic operation on input signals applied to said first means, whereby, in response to the application of a programmed stimulus being applied to components included within the circuits of said second means, input signals applied to said first means will be logically combined in said second means in accordance with a prescribed operation determined by the electrical characteristics of the components of the circuits of said second means, to provide said output signal form said third means.

Claim 7

A universal logical integrated circuit according to claim 3, wherein said second means further comprises a plurality of logical coupling circuits each having a pair of inputs connected to respective pairs of saId output word lines and an output connected to said third means, and further having an individual circuit component, the electrical characteristics of which are variable connected to one of the inputs thereof.

Claim 8

A universal logical integrated circuit according to claim 4, wherein each of said logical coupling circuits comprises a voltage divider network containing an individual circuit component, the electrical characteristics of which are variable, connected between respective terminals to which prescribed voltages are coupled, said individual component of said network being connected to one of the inputs, a first transistor, the base of which is connected to said one input, the emitter of which is connected to a controlled current supply circuit for supplying a controlled current input thereto, and the collector of which is connected to the other input of said pair of inputs, and further including a second transistor, the emitter of which is connected to said other input, the collector of which is connected to the output of the logical coupling circuit and the base of which is connected to a controlled reference potential input.

Claim 9

A universal logical intregrated circuit according to claim 5, wherein said third means includes a clamp circuit connected to each output from said logical coupling circuits of said second means.

Claim 10

A universal logical integrated circuit according to claim 3, wherein each of said semiconductor switching elements comprises a transistor and each of said first, second, third, and fourth individual components comprises an amorphous semiconductor material capable of exhibiting relatively high and low resistance states.

Claim 11

A universal logical integrated circuit according to claim 3, wherein each of said semiconductor switching elements comprises a transistor and said individual components each comprises a fusible semiconductor wire.