Method of testing for the operability of integrated semiconductor circuits having a plurality of separable circuits

Abstract

Abstract A method for determining whether an integrated circuit chip containing a plurality of separable circuits is operable when one or more of the separable circuits is not functional. A chip including a plurality of discrete or separable circuits, each of which include means for selectively receiving and distributing a voltage level necessary to render the particular circuit operable, the chip further including a region of one type conductivity at said voltage level common to all of the discrete circuits is tested by a method which will insure that shortcircuits between a particular circuit found not to be functional and therefore not to be rendered operable and the common region will not inadvertently apply the voltage level from the common region to voltage receiving and distribution means in the nonfunctional circuit. All the discrete circuits are first tested to determine which are functional. Then these circuits which fail the functionality test are tested further to detect whether any of these failed circuits have electrical short-circuits between the common region and the means for receiving and distributing said operable voltage level in the failed circuit. If any of the failed circuits have such a short, the chip is considered to be inoperative because such a short will inadvertently connect the failed circuit with the functional circuits.

Inventors

• 👤 T Baker
• 👤 M Chafghaichi
• 👤 R Stevens
• 👤 D Tuman

Bibliographic Details