Method of increasing capacitance by surface roughening in semiconductor wafer processing

Claim 1

A method of increasing capacitance by surface roughening in semiconductor wafer processing comprising the following steps: applying a first layer of material atop a substrate thereby defining an exposed surface; incontinuously adhering discrete solid particles to the first layer exposed surface to roughen the exposed surface; and applying a second layer of material atop the first layer and the adhered discrete solid particles to define an outer surface, the discrete solid particles adhered to the first layer inducing roughness into the outer surface thereby increasing its surface area and accordingly capacitance of the second layer in a final wafer structure.

Claim 2

A method of increasing capacitance by surface roughening in semiconductor wafer processing comprising the following steps: applying a first layer of material atop a substrate thereby defining an exposed surface; incontinuously adhering discrete solid particles to the first layer exposed surface to roughen the exposed surface; and applying a second layer of material atop the first layer and the adhered discrete solid particles to define an outer surface, the discrete solid particles adhered to the first layer inducing roughness into the outer surface thereby increasing its surface area and accordingly capacitance of the second layer in a final wafer structure.

Claim 19

A method of forming a capacitor in semiconductor wafer processing comprising the following steps: providing a layer of insulating dielectric atop a partially processed semiconductor wafer; etching a contact opening in the dielectric layer which aligns with an active area beneath the dielectric layer; applying a first layer of polysilicon to a thickness of from about 100 to 2,000 Angstroms atop the etched dielectric layer thereby defining an exposed surface of polysilicon, the polysilicon making contact with the active area; incontinuously adhering discrete solid particles to the polysilicon exposed surface to roughen the exposed surface; applying a second layer of polysilicon to a thickness of from about 300 to 2000 Angstroms atop the first polysilicon layer and adhered discrete solid particles to provide a lower capacitor plate having an outer surface, the discrete solid particles adhered to the first polysilicon layer inducing roughness into the outer surface thereby increasing its surface area and accordingly capacitance of the lower capacitor plate in a final wafer structure; applying a layer of capacitor dielectric atop the outer surface, the roughness of the outer surface at least in part being transferred to the capacitor dielectric layer; and applying a third layer of polysilicon atop the capacitor dielectric layer, the roughness of the capacitor dielectric layer at least in part being transferred to the third layer of polysilicon.

Claim 20

A method of forming a capacitor in semiconductor wafer processing comprising the following steps: providing a layer of insulating dielectric atop a partially processed semiconductor wafer; etching a contact opening in the dielectric layer which aligns with an active area beneath the dielectric layer; applying a first layer of polysilicon to a thickness of from about 100 to 2,000 Angstroms atop the etched dielectric layer thereby defining an exposed surface of polysilicon, the polysilicon making contact with the active area; incontinuously adhering discrete solid particles to the polysilicon exposed surface to roughen the exposed surface; applying a second layer of polysilicon to a thickness of from about 300 to 2000 Angstroms atop the first polysilicon layer and adhered discrete solid particles to provide a lower capacitor plate having an outer surface, the discrete solid particles adhered to the first polysilicon layer inducing roughness into the outer surface thereby increasing its surface area and accordingly capacitance of the lower capacitor plate in a final wafer structure; applying a layer of capacitor dielectric atop the outer surface, the roughness of the outer surface at least in part being transferred to the capacitor dielectric layer; and applying a third layer of polysilicon atop the capacitor dielectric layer, the roughness of the capacitor dielectric layer at least in part being transferred to the third layer of polysilicon.

Claim 36

A method of increasing capacitance by surface roughening in semiconductor wafer processing comprising the following steps: applying a first layer of material atop a substrate thereby defining an exposed surface; incontinuously adhering discrete solid particles to the first layer exposed surface, such step of adhering the discrete solid particles comprising dipping the substrate into a slurry of a solution containing the discrete solid particles suspended therein, removing the substrate from the slurry with the discrete solid particles adhering to the first layer, and rinsing remaining solution from the wafer; and etching the first layer having the adhered discrete solid particles with an etch chemistry that etches the first layer material but is selective to the adhered discrete solid particles to etch into and roughen the exposed first layer area not covered by the adhered discrete solid particles.

Claim 37

A method of increasing capacitance by surface roughening in semiconductor wafer processing comprising the following steps: applying a first layer of material atop a substrate thereby defining an exposed surface; incontinuously adhering discrete solid particles to the first layer exposed surface, such step of adhering the discrete solid particles comprising dipping the substrate into a slurry of a solution containing the discrete solid particles suspended therein, removing the substrate from the slurry with the discrete solid particles adhering to the first layer, and rinsing remaining solution from the wafer; and etching the first layer having the adhered discrete solid particles with an etch chemistry that etches the first layer material but is selective to the adhered discrete solid particles to etch into and roughen the exposed first layer area not covered by the adhered discrete solid particles.

Claim 39

A method of increasing capacitance by surface roughening in semiconductor wafer processing comprising the following steps: applying a first layer of material atop a substrate thereby defining an exposed surface; incontinuously adhering discrete solid particles to the first layer exposed surface, such particles comprising SiO 2 ; and etching the first layer having the adhered discrete solid particles with an etch chemistry that etches the first layer material but is selective to the adhered discrete solid particles to etch into and roughen the exposed first layer area not covered by the adhered discrete solid particles.

Claim 40

A method of increasing capacitance by surface roughening in semiconductor wafer processing comprising the following steps: applying a first layer of material atop a substrate thereby defining an exposed surface; incontinuously adhering discrete solid particles to the first layer exposed surface, such particles comprising SiO 2 ; and etching the first layer having the adhered discrete solid particles with an etch chemistry that etches the first layer material but is selective to the adhered discrete solid particles to etch into and roughen the exposed first layer area not covered by the adhered discrete solid particles.

Claim 41

A method of increasing capacitance by surface roughening in semiconductor wafer processing comprising the following steps: applying a first layer of material atop a substrate thereby defining an exposed surface; incontinuously adhering discrete solid particles to the first layer exposed surface, such particles comprising Al 2 O 3 ; and etching the first layer having the adhered discrete solid particles with an etch chemistry that etches the first layer material but is selective to the adhered discrete solid particles to etch into and roughen the exposed first layer area not covered by the adhered discrete solid particles.

Claim 42

A method of increasing capacitance by surface roughening in semiconductor wafer processing comprising the following steps: applying a first layer of material atop a substrate thereby defining an exposed surface; incontinuously adhering discrete solid particles to the first layer exposed surface, such particles comprising Al 2 O 3 ; and etching the first layer having the adhered discrete solid particles with an etch chemistry that etches the first layer material but is selective to the adhered discrete solid particles to etch into and roughen the exposed first layer area not covered by the adhered discrete solid particles.