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US8174115B2
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Multi-chip package memory device
Assignee: Samsung Electronics Co Ltd
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Filing: 2009-11-16
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Granted: 2012-05-08
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Expires: 2029-11-16
Abstract
Abstract Provided is a multi-chip package memory device. The multi-chip package memory device may include a transmission memory chip and a plurality of memory chips that are stacked on the transmission memory chip. The transmission memory chip may include a temporary storage unit, and may transmit a received command or received data to a corresponding memory chip, or to an external element. Each of the memory chips may include a memory core, and may delay the received command according to the properties of the memory chips and then may output delay commands. The transmission memory chip may store the received data in different portions of the temporary storage unit when the delay commands are respectively received.
Inventors
- 👤 Hoe-ju Chung
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 10:24
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/60; H10W90/00; G; G11; G11C; G11C5/00; G11C5/02; G11C5/04; H10W72/00; H10W72/20; H10W72/29; H10W72/90; H10W72/941; H10W72/942; H10W90/20; H10W90/26; H10W90/297; H10W90/701; H10W90/721; H10W90/722; H10W90/724
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
113 words
A multi-chip package memory device comprising a plurality of stacked memory chips, the multi-chip package memory device comprising: a transmission memory chip comprising a temporary storage unit, and transmitting a received command or received data to a corresponding memory chip or an external element; and a plurality of memory chips each comprising a memory core, each delaying the received command according to properties of the corresponding memory chip from among the memory chips, and then outputting a delay command, and stacked on the transmission memory chip, wherein the transmission memory chip stores the received data in different portions of the temporary storage unit when a plurality of the delay commands are respectively received.
Claim 2
Dependent Claim
113 words
A multi-chip package memory device comprising a plurality of stacked memory chips, the multi-chip package memory device comprising: a transmission memory chip comprising a temporary storage unit, and transmitting a received command or received data to a corresponding memory chip or an external element; and a plurality of memory chips each comprising a memory core, each delaying the received command according to properties of the corresponding memory chip from among the memory chips, and then outputting a delay command, and stacked on the transmission memory chip, wherein the transmission memory chip stores the received data in different portions of the temporary storage unit when a plurality of the delay commands are respectively received.
Claim 3
Dependent Claim
53 words
The multi-chip package memory device of claim 1 , wherein the transmission memory chip further comprises a control signal generating unit generating control signals having bits that are sequentially shifted when the delay commands are respectively received, and wherein the temporary storage unit stores the received data in response to the control signal.
Claim 4
Dependent Claim
96 words
The multi-chip package memory device of claim 2 , wherein each of the memory chips comprises a transistor comprising a gate to which a corresponding delay command is applied, a first terminal connected to a first node, and a second terminal connected to a ground voltage, wherein the transmission memory chip comprises a resistor connected between the first node and a power voltage, and wherein the control signal generating unit is connected between the first node and the temporary storage unit, and generates the control signals in response to a signal applied through the first node.
Claim 5
Dependent Claim
55 words
The multi-chip package memory device of claim 2 , wherein the transmission memory chip further comprises a calculating unit performing a logical sum on the delay commands and then sequentially outputting an output signal, and wherein the control signal generating unit generates the control signals in response to the output signal of the calculating unit.
Claim 6
Dependent Claim
58 words
The multi-chip package memory device of claim 4 , wherein the calculating unit comprises: a plurality of transistors each comprising a gate to which a corresponding delay command is applied, a first terminal connected to a first node, and a second terminal connected to a ground voltage; and a resistor between the first node and a power voltage.
Claim 7
Dependent Claim
19 words
The multi-chip package memory device of claim 2 , wherein the control signal generating unit comprises a shift resistor.
Claim 8
Dependent Claim
42 words
The multi-chip package memory device of claim 1 , wherein each of the memory chips comprises a delay controlling unit delaying the received command by as much as a time taken to access the memory core, and then outputting the delay command.
Claim 9
Dependent Claim
30 words
The multi-chip package memory device of claim 1 , wherein the plurality of memory chips are vertically stacked on the transmission memory chip, and are connected via a through electrode.
Claim 10
Dependent Claim
28 words
The multi-chip package memory device of claim 1 , wherein the command comprises a read command, and wherein the temporary storage unit comprises a first-in first-out (FIFO) unit.
Claim 11
Dependent Claim
29 words
The multi-chip package memory device of claim 1 , wherein the transmission memory chip further comprises a memory core, and delays the received command and outputs a delay command.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2015-05-08 | 2015-11-07 | 2016-05-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2019-05-08 | 2019-11-07 | 2020-05-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2023-05-08 | 2023-11-07 | 2024-05-08 | $7700.00 | Window Closed / Lapsed |