Fabrication of field-effect transistor having hypoabrupt body dopant distribution below source/drain zone

Claim 3

A method as in claim 1 wherein the act of introducing the first dopant of the first conductivity type comprises ion implanting the first dopant of the first conductivity type.

Claim 4

A method as in claim 1 wherein the acts of introducing the first dopant of the first conductivity type and performing additional processing are performed at conditions such that, subsequent to the act of performing additional processing, the concentration of all dopant of the first conductivity type decreases by at least a factor of 10 in moving from the aforementioned subsurface body-material location up to the specified S/D zone.

Claim 5

A method as in claim 1 wherein, subsequent to the act of performing additional processing, the aforementioned subsurface body-material location is no more than 5 times deeper below the upper semiconductor surface than the specified S/D zone.

Claim 6

A method as in claim 1 wherein, subsequent to the act of performing additional processing, the concentration of all dopant of the first conductivity type decreases by at least a factor of 20 in moving upward to the specified S/D zone from the aforementioned subsurface body-material location.

Claim 7

A method as in claim 5 wherein, subsequent to the act of performing additional processing, the concentration of all dopant of the first conductivity type decreases by at least a factor of 40 in moving upward to the specified S/D zone from the aforementioned subsurface body-material location.

Claim 8

A method as in claim 1 further including introducing second semiconductor dopant of the first conductivity type into the semiconductor body to define, for the FET, a pocket portion extending along the remaining one of the S/D zones up to its then-existent upper surface such that, subsequent to the act of performing additional processing, (a) the pocket portion constitutes a portion of the body material and is more heavily doped than an adjoining portion of the body material and (b) the concentration of all dopant of the first conductivity type in the body material is lower where the channel zone meets the specified S/D zone along the upper semiconductor surface than where the channel zone meets the remaining S/D zone along the upper semiconductor surface.

Claim 9

A method as in claim 7 wherein, subsequent to the act of performing additional processing, the concentration of all dopant of the first conductivity type in the body material is at least a factor of 10 lower where the channel zone meets the specified S/D zone along the upper semiconductor surface than where the channel zone meets the remaining S/D zone along the upper semiconductor surface.

Claim 10

A method as in claim 1 further including introducing second semiconductor dopant of the first conductivity type into the body material for defining, for the FET, a precursor upper body-material portion of the first conductivity type such that the precursor body-material portion overlies the well portion.

Claim 11

A method as in claim 1 wherein: part of the semiconductor body (a) overlies the well portion as it exists directly after the act of introducing the first semiconductor dopant of the first conductivity type and (b) is then of the second conductivity type; and part of the first dopant of the first conductivity type diffuses upward into the aforementioned part of the semiconductor body during the act of performing additional processing so as to cause substantially all of the aforementioned part of the semiconductor body not significantly subjected to other doping of the first or second conductivity type subsequent to the act of introducing the first dopant of the first conductivity type to be converted to the first conductivity type.

Claim 12

A method as in claim 1 wherein the act of introducing the first semiconductor dopant of the second conductivity type comprises: introducing lateral-extension semiconductor dopant of the second conductivity type through an opening in a lateral-extension mask, through the then-existent upper surface of the semiconductor body, and into a pair of laterally separated primary portions of the semiconductor body using the lateral-extension mask, the gate electrode, and any material along the gate electrode as a dopant-blocking shield; providing spacer material to the transverse sides of the gate electrode; and introducing main-portion semiconductor dopant of the second conductivity type through an opening in a main-portion mask, through the then-existent upper surface of the semiconductor body, and into a pair of laterally separated further portions of the semiconductor body using the main-portion mask, the gate electrode, and the spacer material as a dopant-blocking shield.

Claim 13

A method as in claim 1 wherein the act of introducing the first semiconductor dopant of the second conductivity type comprises: performing one of (a) introducing main-portion semiconductor dopant of the second conductivity type into the semiconductor body at a main-portion dosage and to a main-portion average depth below the then-existent upper surface of the semiconductor body and (b) introducing lower-portion semiconductor dopant of the second conductivity type into the semiconductor body at a lower-portion dosage and to a lower-portion average depth below the-existent upper surface of the semiconductor body, the main-portion dosage being greater than the lower-portion dosage, the lower-portion average depth being greater than the main-portion average depth; and performing the other of introducing the main-portion and lower-portion dopants such that the main-portion dopant defines a pair of laterally separated main S/D portions respectively of the S/D zones, such that the lower-portion dopant defines a pair of laterally separated lower S/D portions respectively of the S/D zones, and such that the lower S/D portions are more lightly doped than, respectively underlie, and are respectively vertically continuous with the main S/D portions.

Claim 14

A method as in claim 1 wherein: the act of introducing the first dopant of the first conductivity type includes introducing additional first semiconductor dopant of the first conductivity type into the semiconductor body to define a further well portion of the first conductivity type for a further FET of like polarity to the principal FET; the gate-electrode-defining act includes defining, for the further FET, a further gate electrode above, and vertically separated by further gate dielectric material from, a segment of the semiconductor body intended to be a further channel zone of the first conductivity type; the act of introducing the first dopant of the second conductivity type includes introducing further first semiconductor dopant of the second conductivity type into the semiconductor body to form, for the further FET, a pair of further S/D zones of the second conductivity type laterally separated by the further channel zone; and the act of performing additional processing includes completing fabrication of the further FET such that, subsequent to the act of performing additional processing, (a) the further channel zone and the further well portion are parts of the body material, (b) the body material extends below the further S/D zones, and (c) the concentration of all dopant of the first conductivity type is substantially constant or changes by less than a factor of 10 in moving upward to each further S/D zone from a further underlying subsurface body-material location approximately as deep below the upper semiconductor surface as the aforementioned principal subsurface body-material location.

Claim 15

A method as in claim 1 wherein: the method includes introducing second semiconductor dopant of the second conductivity type into a semiconductor body to define an additional well portion of the second conductivity type for an additional FET of opposite polarity to the principal FET; the gate-electrode-defining act includes defining, for the additional FET, an additional gate electrode above, and vertically separated by additional gate dielectric material from, a segment of the semiconductor body intended to be an additional channel zone of the second conductivity type; the method further includes introducing second semiconductor dopant of the first conductivity type into the semiconductor body to form, for the additional FET, a pair of additional S/D zones of the second conductivity type laterally separated by the additional channel zone; and the act of performing additional processing includes completing fabrication of the additional FET such that, subsequent to the act of performing additional processing, (a) the additional channel zone and the additional well portion are parts of additional body material which is of the second conductivity type and which extends below the additional S/D zones and (b) all semiconductor dopant of the second conductivity type in the semiconductor body has a concentration that decreases by at least a factor of 10 in moving upward to a specified one of the additional S/D zones from an additional underlying subsurface body-material location which is no more than 10 times deeper below the upper semiconductor surface than the specified additional S/D zone.

Claim 16

A method as in claim 14 wherein the act of introducing the first dopant of the first conductivity type includes introducing further first semiconductor dopant of the first conductivity type into the semiconductor body to define a third well portion of the first conductivity type for a third FET of like polarity to the principal FET; the gate-electrode-defining act includes defining, for the third FET, a third gate electrode above, and vertically separated by third gate dielectric material from, a segment of the semiconductor body intended to be a third channel zone of the first conductivity type; the act of introducing the first dopant of the second conductivity type includes introducing further first semiconductor dopant of the second conductivity type into the semiconductor body to form, for the third FET, a pair of third S/D zones of the second conductivity type laterally separated by the third channel zone; and the act of performing additional processing includes completing fabrication of the third FET such that, subsequent to the act of performing additional processing, (a) the third channel zone and the third well portion are parts of the principal body material which extends below the third S/D zones and (b) the concentration of all dopant of the first conductivity type is substantially constant or changes by less than a factor of 10 in moving upward to each third S/D zone from a third underlying subsurface body-material location approximately as deep below the upper semiconductor surface as the aforementioned principal subsurface body-material location.

Claim 17

A method as in claim 15 wherein: the act of introducing the second dopant of the second conductivity type includes introducing further second semiconductor dopant of the second conductivity type into the semiconductor body to define a fourth well portion of the second conductivity type for a fourth FET of the same polarity as the additional FET and thus of opposite polarity to the principal FET; the gate-electrode-defining act includes defining, for the fourth FET, a fourth gate electrode above, and vertically separated by fourth gate dielectric material from, a segment of the semiconductor body intended to be a fourth channel zone of the second conductivity type; the act of introducing the second dopant of the first conductivity type includes introducing further second semiconductor dopant of the first conductivity type into the semiconductor body to form, for the fourth FET, a pair of fourth S/D zones of the first conductivity type laterally separated by the fourth channel zone; and the act of performing additional processing includes completing fabrication of the fourth FET such that, subsequent to the act of performing additional processing, (a) the fourth channel zone and the fourth well portion are parts of the additional body material which extends below the fourth S/D zones and (b) the concentration of all dopant of the second conductivity type is substantially constant or changes by less than a factor of 10 in moving upward to each fourth S/D zone from a fourth underlying subsurface body-material location approximately as deep below the upper semiconductor surface as the aforementioned additional subsurface body-material location.

Claim 18

A method as in claim 1 wherein, subsequent to the act of performing additional processing, the well portion is more heavily doped than overlying and underlying portions of the body material.

Claim 19

A method as in claim 1 wherein the gate-electrode-defining act is largely performed subsequent to the act of introducing the first semiconductor dopant of the first conductivity type.

Claim 20

A method as in claim 18 wherein the act of introducing the first semiconductor dopant of the second conductivity type is largely performed subsequent to the gate-electrode-defining act.

Claim 21

A method as in claim 14 wherein, subsequent to the act of performing additional processing, (i) the principal well portion is more heavily doped than overlying and underlying portions of the principal body material and (ii) the additional well portion is more heavily doped than overlying and underlying portions of the additional body material.