Patent US6815970B2 successfully refreshed from Google Patents.
US6815970B2
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US
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Method for measuring NBTI degradation effects on integrated circuits
Assignee: Texas Instruments Inc
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Filing: 2002-08-22
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Granted: 2004-11-09
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Expires: 2022-08-22
Abstract
Abstract A method of testing integrated circuits for the effect of NBTI degradation. A static DC stress voltage is applied to the voltage supply input of the circuit. This circuit is held at this voltage for a given stress period. The application of the DC voltage is equivalent to applying a negative gate bias, and isolates the effects of NBTI degradation from CHC (channel hot carrier) degradation or other degradation that occurs when the circuit has a clocked input.
Inventors
- 👤 Timothy A. Rost
- 👤 Vijay Reddy
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 11:51
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/28; G01R31/2851; G01R31/2855; G01R31/286; G01R31/2868; G01R31/287
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
88 words
A method of testing an integrated circuit to determine the effect of negative bias temperature instability (NBTI), comprising the steps of: applying a DC stress voltage at the voltage supply input of the circuit, the DC stress voltage being appropriate for inducing NBTI within the circuit; holding all other circuit inputs and outputs at either ground or the DC stress voltage; maintaining the DC stress voltage for a DC stress period; and after the DC stress period, taking measurements of at least one electrical parameter of the circuit.
Claim 2
Independent Claim
88 words
A method of testing an integrated circuit to determine the effect of negative bias temperature instability (NBTI), comprising the steps of: applying a DC stress voltage at the voltage supply input of the circuit, the DC stress voltage being appropriate for inducing NBTI within the circuit; holding all other circuit inputs and outputs at either ground or the DC stress voltage; maintaining the DC stress voltage for a DC stress period; and after the DC stress period, taking measurements of at least one electrical parameter of the circuit.
Claim 3
Dependent Claim
21 words
The method of claim 1 , further comprising the step of applying heat to the circuit during the DC stress period.
Claim 4
Dependent Claim
36 words
The method of claim 1 , further comprising the step of removing the DC stress voltage after the maintaining and measuring steps, and applying a clocked stress voltage to the circuit during a clocked stress period.
Claim 5
Dependent Claim
25 words
The method of claim 3 , further comprising the step of isolating the effects of NBTI from the effects of channel hot carrier (CHC) degradation.
Claim 6
Dependent Claim
14 words
The method of claim 1 , wherein the electrical parameter is minimum operating voltage.
Claim 7
Dependent Claim
30 words
The method of claim 5 , further comprising the step of comparing measured minimum operating voltages for the circuit after the DC stress period to a specified minimum operating voltage.
Claim 8
Dependent Claim
14 words
The method of claim 1 , wherein the electrical parameter is maximum output frequency.
Claim 9
Dependent Claim
18 words
The method of claim 1 , wherein the DC stress voltage is constant during the DC stress period.
Claim 10
Dependent Claim
21 words
The method of claim 1 , further comprising the steps of holding and taking measurements for a number of stress cycles.
Claim 11
Independent Claim
103 words
A method of testing an integrated circuit to determine the effect of negative bias temperature instability (NBTI) on minimum operating voltage, comprising the steps of: applying a DC stress voltage at the voltage supply input of the circuit, the DC stress voltage being appropriate for inducing NBTI within the circuit; holding all other circuit inputs and outputs at either ground or the DC stress voltage; maintaining the DC stress voltage for a DC stress period; after the DC stress period, taking measurements of the minimum operation voltage; and determining whether the minimum operating voltage exceeds a predetermined circuit specification for minimum operating voltage.
Claim 12
Independent Claim
103 words
A method of testing an integrated circuit to determine the effect of negative bias temperature instability (NBTI) on minimum operating voltage, comprising the steps of: applying a DC stress voltage at the voltage supply input of the circuit, the DC stress voltage being appropriate for inducing NBTI within the circuit; holding all other circuit inputs and outputs at either ground or the DC stress voltage; maintaining the DC stress voltage for a DC stress period; after the DC stress period, taking measurements of the minimum operation voltage; and determining whether the minimum operating voltage exceeds a predetermined circuit specification for minimum operating voltage.
Claim 13
Dependent Claim
21 words
The method of claim 10 , further comprising the step of applying heat to the circuit during the DC stress period.
Claim 14
Dependent Claim
36 words
The method of claim 10 , further comprising the step of removing the DC stress voltage after the maintaining and measuring steps, and applying a clocked stress voltage to the circuit during a clocked stress period.
Claim 15
Dependent Claim
25 words
The method of claim 12 , further comprising the step of isolating the effects of NBTI from the effects of channel hot carrier (CHC) degradation.
Claim 16
Dependent Claim
18 words
The method of claim 10 , wherein the DC stress voltage is constant during the DC stress period.
Claim 17
Dependent Claim
21 words
The method of claim 10 , further comprising the steps of holding and taking measurements for a number of stress cycles.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2007-11-09 | 2008-05-10 | 2008-11-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2011-11-09 | 2012-05-10 | 2012-11-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2015-11-09 | 2016-05-10 | 2016-11-09 | $7700.00 | Window Closed / Lapsed |