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US6706571B1 Expired / Lapsed US ⏱️ 0.0 years remaining

Method for forming multiple structures in a semiconductor device

Assignee: GlobalFoundries US Inc
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Filing: 2002-10-22
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Granted: 2004-03-16
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Expires: 2022-10-22
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Abstract

Abstract A method of forming multiple structures in a semiconductor device includes depositing a film over a conductive layer, etching a trench in a portion of the film and forming adjacent the sidewalls of the trench. The film may then be etched, followed by an of the conductive layer to form the structures.

Inventors

  • 👤 Bin Yu
  • 👤 Judy Xilin An
  • 👤 Cyrus E. Tabery
  • 👤 HaiHong Wang

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 19:05
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/62; H10D30/01; H10D30/021; H10D30/024; H10D30/67; H10D30/6729; H10D30/6737; H10D30/6739; H10D30/674; H10D30/6741

Claims Analysis

Total Claims: 22
Claim 1
Independent Claim 139 words
A method of forming a plurality of fins in a FinFET device, comprising: depositing a dielectric layer over a silicon on insulator (SOI) wafer, the SOI wafer comprising a conductive layer on an insulating layer; forming a resist mask over portions of the dielectric layer; etching a trench in a portion of the dielectric layer not covered by the resist mask, the trench having two side walls; forming spacers adjacent the two sidewalls of the trench, the spacers comprising a conductive material and having a width ranging from about 100 Å to about 500 Å; etching the dielectric layer to form dielectric structures located below the spacers, the dielectric structures having a width approximately equal to the width of the spacers; etching the conductive layer to form the plurality of fins; and removing the spacers and the dielectric structures.
Claim 2
Independent Claim 139 words
A method of forming a plurality of fins in a FinFET device, comprising: depositing a dielectric layer over a silicon on insulator (SOI) wafer, the SOI wafer comprising a conductive layer on an insulating layer; forming a resist mask over portions of the dielectric layer; etching a trench in a portion of the dielectric layer not covered by the resist mask, the trench having two side walls; forming spacers adjacent the two sidewalls of the trench, the spacers comprising a conductive material and having a width ranging from about 100 Å to about 500 Å; etching the dielectric layer to form dielectric structures located below the spacers, the dielectric structures having a width approximately equal to the width of the spacers; etching the conductive layer to form the plurality of fins; and removing the spacers and the dielectric structures.
Claim 3
Dependent Claim 23 words
The method of claim 1 , wherein a pitch of the plurality of fins ranges from about 500 Å to about 1500 Å.
Claim 4
Dependent Claim 69 words
The method of claim 1 , wherein the forming a resist mask over a portion of the dielectric layer includes: depositing a photoresist material over the dielectric layer, and forming at least a first opening in the photoresist material, wherein the opening exposes the dielectric layer and a distance between at least two of the plurality of fins is defined in part by the width of the first opening.
Claim 5
Dependent Claim 30 words
The method of claim 1 , wherein the etching a trench comprises: etching about 300 Å to about 1000 Å of the dielectric layer not covered by the resist mask.
Claim 6
Dependent Claim 27 words
The method of claim 1 , wherein the insulating layer comprises a buried oxide layer and the conductive layer comprises at least one of silicon and germanium.
Claim 7
Dependent Claim 11 words
The method of claim 5 , wherein the spacers comprise silicon.
Claim 8
Dependent Claim 14 words
The method of claim 1 , wherein the dielectric layer comprises a silicon oxide.
Claim 9
Dependent Claim 15 words
The method of claim 1 , wherein the plurality of fins consists of two fins.
Claim 10
Independent Claim 185 words
A method of manufacturing a semiconductor device, comprising: depositing a film over a conductive layer, the conductive layer being used to form a plurality of fin structures; etching at least one trench in a portion of the film, a first one of the at least one trench having two side walls; forming spacers adjacent the two sidewalls of the first trench, the spacers having a first width and comprising a conductive material; etching the film, the etching terminating on the conductive layer with the spacers acting as a mask to prevent etching of portions of the film located below the spacers, the un-etched portions of the film forming a first plurality of structures approximately equal in width to the first width; etching the conductive layer, the first plurality of structures acting as a mask to prevent portions of the conductive layer from being etched, the un-etched portions of the conductive layer forming the fin structures; forming a source region and a drain region; depositing a gate material over the fin structures; and patterning and etching the gate material to form at least one gate electrode.
Claim 11
Independent Claim 185 words
A method of manufacturing a semiconductor device, comprising: depositing a film over a conductive layer, the conductive layer being used to form a plurality of fin structures; etching at least one trench in a portion of the film, a first one of the at least one trench having two side walls; forming spacers adjacent the two sidewalls of the first trench, the spacers having a first width and comprising a conductive material; etching the film, the etching terminating on the conductive layer with the spacers acting as a mask to prevent etching of portions of the film located below the spacers, the un-etched portions of the film forming a first plurality of structures approximately equal in width to the first width; etching the conductive layer, the first plurality of structures acting as a mask to prevent portions of the conductive layer from being etched, the un-etched portions of the conductive layer forming the fin structures; forming a source region and a drain region; depositing a gate material over the fin structures; and patterning and etching the gate material to form at least one gate electrode.
Claim 12
Dependent Claim 24 words
The method of claim 9 , wherein a distance between the plurality of fin structures ranges from about 500 Å to about 1500 Å.
Claim 13
Dependent Claim 35 words
The method of claim 9 , wherein the etching at least one trench comprises: etching about 300 Å to about 1000 Å into a top surface of the film not covered by a resist mask.
Claim 14
Dependent Claim 42 words
The method of claim 9 , wherein the etching at least one trench comprises: etching at least one trench having a predetermined width, wherein a pitch of at least two of the plurality of fin structures is based on the predetermined width.
Claim 15
Dependent Claim 46 words
The method of claim 9 , wherein the conductive layer is formed on a buried oxide layer that is formed on a semiconducting material, the conductive layer comprising at least one of silicon and germanium, the film comprising a silicon oxide and the spacers comprising silicon.
Claim 16
Dependent Claim 50 words
The method of claim 9 , wherein the at least one gate electrode comprises two gate electrodes, a first gate electrode being located on a first side of the plurality of fin structures and a second gate electrode being located on an opposite side of the plurality of fin structures.
Claim 17
Independent Claim 78 words
A method of forming a plurality of structures in a semiconductor device, comprising: depositing a film over a conductive layer; etching at least one trench in a portion of the film; forming conductive spacers along sidewalls of the at least one trench; etching the film, the etching terminating on the conductive layer; and etching the conductive layer to form the plurality of structures wherein the semiconductor device comprises a finFET device and the plurality of structures comprise fins.
Claim 18
Independent Claim 78 words
A method of forming a plurality of structures in a semiconductor device, comprising: depositing a film over a conductive layer; etching at least one trench in a portion of the film; forming conductive spacers along sidewalls of the at least one trench; etching the film, the etching terminating on the conductive layer; and etching the conductive layer to form the plurality of structures wherein the semiconductor device comprises a finFET device and the plurality of structures comprise fins.
Claim 19
Dependent Claim 35 words
The method of claim 15 , wherein the film comprises a dielectric material and the etching the film forms dielectric structures below the spacers, the method further comprising: removing the spacers and the dielectric structures.
Claim 20
Dependent Claim 45 words
The method of claim 15 , wherein the plurality of structures comprises a plurality of fins and the at least one trench comprises two trenches, the two trenches being laterally separated by a predetermined distance and each of the two trenches having a predetermined width.
Claim 21
Dependent Claim 23 words
The method of claim 17 , wherein a distance between a first fin and a second fin is defined by the predetermined width.
Claim 22
Dependent Claim 23 words
The method of claim 18 , wherein a distance between the second fin and a third fin is defined by the predetermined distance.

References Cited (Backward Citations)

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US6514819B1 Cited
US5989952A Cited
US20030006410A1 Cited
US6391782B1 Cited
US6501134B1 Cited
US6492212B1 Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2007-03-16 2007-09-15 2008-03-16 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2011-03-16 2011-09-15 2012-03-16 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2015-03-16 2015-09-15 2016-03-16 $7700.00 Window Closed / Lapsed

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