US6597016B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device and method for fabricating the same
Assignee: Panasonic Holdings Corp
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Filing: 2000-01-13
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Granted: 2003-07-22
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Expires: 2020-01-13
Abstract
Abstract An Si 1−y Ge y layer (where 0<y<1), an Si layer containing C, a gate insulating film and a gate electrode are formed in this order on a semiconductor substrate. An Si/SiGe heterounction junction is formed between the Si and Si 1−y Ge y layers. Since C is contained in the Si layer, movement, diffusion and segregation of Ge atoms in the Si 1−y Ge y layer can be suppressed. As a result, the Si/Si 1−y Ge y interface can have its structural disorder eased and can be kept definite and planar. Thus, the mobility of carriers moving along the interface in the channel can be increased. That is to say, the thermal budget of the semiconductor device during annealing can be improved. Also, by grading the concentration profile of C, the diffusion of C into the gate insulating film can be suppressed and decline in reliability can be prevented.
Inventors
- 👤 Koichiro Yuki
- 👤 Tohru Saitoh
- 👤 Minoru Kubo
- 👤 Kiyoshi Ohnaka
- 👤 Akira Asai
- 👤 Koji Katayama
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 09:24
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/80; H10P; H10P30/00; H10P30/20; H10P30/202; H10P30/204; H10D30/00; H10D30/60; H10D30/751; H10D30/791; H10D30/798; H10D62/00; H10D62/80; H10D62/82; H10D62/822; H10D62/83; H10D62/834; H10P30/208; H10P30/225
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
79 words
A semiconductor device comprising: a semiconductor substrate; a first semiconductor layer, which is formed within the semiconductor substrate and is made of an Si 1−y Ge y layer (0<y<1); and a second semiconductor layer, which is formed within the semiconductor substrate to be in contact with the first semiconductor layer and is made of an Si layer containing C; a gate electrode formed on the semiconductor substrate; and a channel formed in the Si layer under the gate electrode.
Claim 2
Dependent Claim
79 words
A semiconductor device comprising: a semiconductor substrate; a first semiconductor layer, which is formed within the semiconductor substrate and is made of an Si 1−y Ge y layer (0<y<1); and a second semiconductor layer, which is formed within the semiconductor substrate to be in contact with the first semiconductor layer and is made of an Si layer containing C; a gate electrode formed on the semiconductor substrate; and a channel formed in the Si layer under the gate electrode.
Claim 3
Dependent Claim
21 words
The device of claim 1 , further comprising a gate insulating film interposed between the gate electrode and the Si layer.
Claim 4
Dependent Claim
22 words
The device of claim 2 , further comprising an intrinsic Si layer interposed between the Si layer and the gate insulating film.
Claim 5
Dependent Claim
58 words
The device of claim 1 , wherein the Si layer is located closer to the surface of the semiconductor substrate than the Si 1−y Ge y layer is, and wherein a concentration of C in the Si layer has such a profile as decreasing from the Si 1−y Ge y layer toward the surface of the semiconductor substrate.
Claim 6
Dependent Claim
151 words
A semiconductor device comprising: a semiconductor substrate; a first semiconductor layer, which is formed within the semiconductor substrate and is made of an Si 1−y Ge y layer (0<y<1); and a second semiconductor layer, which is formed within the semiconductor substrate to be in contact with the first semiconductor layer and is made of an Si layer containing C, wherein the Si layer is located closer to the surface of the semiconductor substrate than the Si 1−y Ge y layer is, and wherein the device further comprises: a gate electrode; a second Si layer, which is formed under the Si 1−y Ge y layer and contains C; an Si 1−x Ge x layer formed under the second Si layer, where 0<x<1; and a σ-doped layer, which is formed within the Si 1−x Ge x layer in a region thereof closer to the second Si layer and contains a high-concentration carrier dopant.
Claim 7
Dependent Claim
151 words
A semiconductor device comprising: a semiconductor substrate; a first semiconductor layer, which is formed within the semiconductor substrate and is made of an Si 1−y Ge y layer (0<y<1); and a second semiconductor layer, which is formed within the semiconductor substrate to be in contact with the first semiconductor layer and is made of an Si layer containing C, wherein the Si layer is located closer to the surface of the semiconductor substrate than the Si 1−y Ge y layer is, and wherein the device further comprises: a gate electrode; a second Si layer, which is formed under the Si 1−y Ge y layer and contains C; an Si 1−x Ge x layer formed under the second Si layer, where 0<x<1; and a σ-doped layer, which is formed within the Si 1−x Ge x layer in a region thereof closer to the second Si layer and contains a high-concentration carrier dopant.
Claim 8
Dependent Claim
32 words
The device of claim 5 , wherein the Si and second Si layers receive a tensile strain, and wherein a strain applied to the Si 1−x Ge x layer has been relaxed.
Claim 9
Dependent Claim
20 words
The device of claim 5 , further comprising gate insulating films formed between the gate electrodes and the Si layer.
Claim 10
Dependent Claim
21 words
The device of claim 7 , further comprising intrinsic Si layers formed between the gate insulating films and the Si layer.
Claim 11
Dependent Claim
35 words
The device of claim 7 , wherein a concentration of C in the Si layer has such a profile as decreasing from the Si 1−y Ge y layer toward the surface of the semiconductor substrate.
Claim 12
Dependent Claim
36 words
The device of claim 5 , wherein a concentration of C in the second Si layer has such a profile as decreasing from the Si 1−x Ge x layer toward the Si 1−y Ge y layer.
Claim 13
Dependent Claim
28 words
The device of claim 5 , wherein a content of Ge in the Si 1−y Ge y layer increases from the second Si layer toward the Si layer.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2006-07-21 | 2007-01-20 | 2007-07-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2010-07-21 | 2011-01-20 | 2011-07-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2014-07-21 | 2015-01-20 | 2015-07-22 | $7700.00 | Window Closed / Lapsed |