US6590282B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
Stacked semiconductor package formed on a substrate and method for fabrication
Assignee: Industrial Technology Research Institute
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Filing: 2002-04-12
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Granted: 2003-07-08
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Expires: 2022-04-12
Abstract
Abstract A stacked semiconductor package formed on a substrate arranged in a serpentine configuration and a method for such fabrication are disclosed. The package is formed by at least one substrate section formed on the substrate bonded to at least one IC die by a flip-chip bonding method. The substrate is then folded onto itself such that the backside of a first IC die is adhesively bonded to the backside of a second IC die. A heat sink may optionally be utilized in-between the IC dies during the adhesive bonding process to further enhance thermal dissipation. The substrate section may be bonded to a printed circuit board by a plurality of solder balls formed on an active surface of the substrate section. The present invention can be bonded to a printed circuit board either in a horizontal position or in a vertical position for saving more real-estate on the board.
Inventors
- 👤 Hsing-Seng Wang
- 👤 Rong-Shen Lee
- 👤 Chia-Chung Wang
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 11:48
CPC Classifications
H; H10; H10W; H10W90/00; H10W72/00; H10W72/071; H10W72/072; H10W72/07251; H10W72/20; H10W72/60; H10W72/834; H10W90/20; H10W90/288; H10W90/291; H10W90/701; H10W90/721; H10W90/724
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
318 words
A stacked semiconductor package formed on a substrate arranged in a serpentine configuration comprising: a first substrate section formed on a first section of said substrate having an insulating layer bonded to and a first plurality of I/O pads formed on a bottom surface, a first plurality of solder balls formed on said first plurality of I/O pads, a second plurality of I/O pads formed on a top surface through said first section of the substrate, a second plurality of solder bumps formed on said second plurality of I/O pads, and a third plurality of metal wiring formed in said insulating layer providing electrical communication between said first plurality of I/O pads and said second plurality of I/O pads; a first IC die having a fourth plurality of solder bumps formed in an active surface for bonding to said second plurality of solder bumps formed in said first substrate section; a second substrate section formed on a second section of said substrate having an insulating layer bonded to and a first plurality of I/O pads formed on a top surface, a second plurality of I/O pads formed on a bottom surface through said second section of the substrate, a second plurality of solder bumps formed on said second plurality of I/O pads, and a third plurality of metal wiring formed in said insulating layer providing electrical communication between said first and said second plurality of I/O pads; a second IC die having a fourth plurality of solder bumps formed in an active surface for bonding to said second plurality of solder bumps formed in said second substrate section; and a first U-shaped section of said substrate integrally connecting said first and said second section of the substrate such that an inactive surface of said first IC die is adhesively bonded to an inactive surface of said second IC die in a back-to-back relationship forming said stacked semiconductor package.
Claim 2
Dependent Claim
318 words
A stacked semiconductor package formed on a substrate arranged in a serpentine configuration comprising: a first substrate section formed on a first section of said substrate having an insulating layer bonded to and a first plurality of I/O pads formed on a bottom surface, a first plurality of solder balls formed on said first plurality of I/O pads, a second plurality of I/O pads formed on a top surface through said first section of the substrate, a second plurality of solder bumps formed on said second plurality of I/O pads, and a third plurality of metal wiring formed in said insulating layer providing electrical communication between said first plurality of I/O pads and said second plurality of I/O pads; a first IC die having a fourth plurality of solder bumps formed in an active surface for bonding to said second plurality of solder bumps formed in said first substrate section; a second substrate section formed on a second section of said substrate having an insulating layer bonded to and a first plurality of I/O pads formed on a top surface, a second plurality of I/O pads formed on a bottom surface through said second section of the substrate, a second plurality of solder bumps formed on said second plurality of I/O pads, and a third plurality of metal wiring formed in said insulating layer providing electrical communication between said first and said second plurality of I/O pads; a second IC die having a fourth plurality of solder bumps formed in an active surface for bonding to said second plurality of solder bumps formed in said second substrate section; and a first U-shaped section of said substrate integrally connecting said first and said second section of the substrate such that an inactive surface of said first IC die is adhesively bonded to an inactive surface of said second IC die in a back-to-back relationship forming said stacked semiconductor package.
Claim 3
Dependent Claim
169 words
A stacked semiconductor package formed on a substrate arranged in a serpentine configuration according to claim 1 further comprising: a third substrate section having a structure substantially similar to said first substrate section; a third IC die having a structure substantially similar to said first IC die; a fourth substrate section having a structure substantially similar to said second substrate section; a fourth IC die having a structure substantially similar to said second IC die; a second U-shaped section of said substrate integrally connecting said second and said third section of the substrate such that said top surface of said second substrate section is bonded to said bottom surface of said third substrate section by an electrically insulating adhesive; and a third U-shaped section of said substrate integrally connecting said third and said fourth section of the substrate such that an inactive surface of said third IC die is adhesively bonded to an inactive surface of said fourth IC die in a back-to-back relationship forming said stacked semiconductor package.
Claim 4
Dependent Claim
31 words
A stacked semiconductor package formed on a substrate arranged in a serpentine configuration according to claim 1 further comprising a printed circuit board bonded to said first plurality of solder balls.
Claim 5
Dependent Claim
48 words
A stacked semiconductor package formed on a substrate arranged in a serpentine configuration according to claim 1 further comprising a passivation layer on said top and said bottom surface of said first and said second substrate section for insulating said first and said second plurality of I/O pads.
Claim 6
Dependent Claim
50 words
A stacked semiconductor package formed on a substrate arranged in a serpentine configuration according to claim 1 further comprising a metal lead layer on said top surface of said first substrate section and said bottom surface of said second substrate section for providing electrical communication between said two substrate sections.
Claim 7
Dependent Claim
58 words
A stacked semiconductor package formed on a substrate arranged in a serpentine configuration according to claim 1 further comprising an underfill layer filling a gap formed between said second plurality of solder bumps on said top surface of the first substrate section and said second plurality of solder bumps on said bottom surface of the second substrate section.
Claim 8
Dependent Claim
28 words
A stacked semiconductor package formed on a substrate arranged in a serpentine configuration according to claim 6 , wherein said underfill layer being formed of an elastomeric material.
Claim 9
Dependent Claim
26 words
A stacked semiconductor package formed on a substrate arranged in a serpentine configuration according to claim 4 , wherein said passivation layer is a solder mask.
Claim 10
Dependent Claim
28 words
A stacked semiconductor package formed on a flexible substrate arranged in a serpentine configuration according to claim 1 , wherein said substrate being formed of a polymeric material.
Claim 11
Dependent Claim
27 words
A stacked semiconductor package formed on a substrate arranged in a serpentine configuration according to claim 5 , wherein said metal lead layer being formed of copper.
Claim 12
Dependent Claim
34 words
A stacked semiconductor package formed on a substrate arranged in a serpentine configuration according to claim 1 further comprising a heat sink adhesively bonded between said first IC die and said second IC die.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2006-07-07 | 2007-01-06 | 2007-07-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2010-07-07 | 2011-01-06 | 2011-07-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2014-07-07 | 2015-01-06 | 2015-07-08 | $7700.00 | Window Closed / Lapsed |