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US6574143B2
Expired / Lapsed
US
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Memory device using hot charge carrier converters
Assignee: Hitachi Ltd
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Filing: 2000-12-08
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Granted: 2003-06-03
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Expires: 2020-12-08
Abstract
Abstract A flash memory cell is based on a floating gate transistor design in which a floating gate is separated from a channel by a tunnel oxide. The cell is programmed and erased by electrons tunnelling on and off the floating gate through the tunnel oxide. To retain charge stored on the floating gate, the tunnel oxide is relatively thick. As a result it takes a long time, of the order of 100 μs, to program and erase the cell, Injection of charge onto the floating gate is helped by hot-electron and channel inversion effects. However, no such effects help tunnelling of charge off the floating gate, Introduction of a silicon heterostructure hot-electron diode comprising an intrinsic silicon region promotes electron transport from the floating gate during erasing cycles and so reduces the erase voltage. Furthermore, the intrinsic silicon region provides an additional barrier to charge leakage, so permitting a thinner tunnel oxide to be used and thus read/write cycles become shorter.
Inventors
- 👤 Kazuo Nakazato
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 01:09
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/68; H10D30/681; H10D30/684; H10D30/685; H10D30/6891; H10D64/00; H10D64/01; H10D64/031; H10D64/035
Claims Analysis
Total Claims: 47
Claim 1
Independent Claim
96 words
A memory device comprising: a path for charge carriers; source and drain regions disposed at either end of the path; a node for storing charge carriers to produce a field which alters the conductivity of the path and first and second hot-carrier diodes each for converting stored charge carriers into hot charge carriers so as to allow said charge carriers to leave said node and enter said source or drain regions in response to a given voltage configuration and for preventing charge carriers entering said source and drain regions in the absence of said voltage configuration.
Claim 2
Dependent Claim
96 words
A memory device comprising: a path for charge carriers; source and drain regions disposed at either end of the path; a node for storing charge carriers to produce a field which alters the conductivity of the path and first and second hot-carrier diodes each for converting stored charge carriers into hot charge carriers so as to allow said charge carriers to leave said node and enter said source or drain regions in response to a given voltage configuration and for preventing charge carriers entering said source and drain regions in the absence of said voltage configuration.
Claim 3
Dependent Claim
20 words
The device according to claim 1 further comprising a control electrode operable to control charging and discharging of the node.
Claim 4
Dependent Claim
35 words
A method of operating a memory device according to claim 2 comprising applying a gate bias to the control electrode, a drain bias to the dram region and a source bias to the source region.
Claim 5
Dependent Claim
32 words
A method according to claim 3 wherein the applying of thee gate bias comprises setting the gate bias to 0V and setting either the drain bias or the source bias to 6V.
Claim 6
Dependent Claim
12 words
The device according to claim 1 , wherein the carrier comprises electrons.
Claim 7
Dependent Claim
14 words
The device according to claim 1 , wherein the first converter comprises semiconductor material.
Claim 8
Dependent Claim
13 words
The device according to claim 6 , wherein the semiconductor material is silicon.
Claim 9
Dependent Claim
13 words
The device according to claim 6 , wherein the semiconductor material is undoped.
Claim 10
Dependent Claim
15 words
The device according to claim 6 , wherein the semiconductor is doped with an impurity.
Claim 11
Dependent Claim
19 words
The device according to claim 9 , wherein the impurity concentration is less than 10 17 cm −3 .
Claim 12
Dependent Claim
16 words
The device according to claim 9 , wherein the impurity comprises an element that donates electrons.
Claim 13
Dependent Claim
12 words
The device according to claim 11 , wherein the impurity is phosphorous.
Claim 14
Dependent Claim
12 words
The device according to claim 11 , wherein the impurity is arsenic.
Claim 15
Dependent Claim
16 words
The device according to claim 9 , wherein the impurity comprises an element that accepts electrons.
Claim 16
Dependent Claim
12 words
The device according to claim 14 , wherein the impurity is boron.
Claim 17
Dependent Claim
22 words
The device according to claim 1 further comprising a first tunnel barrier through which charge carriers may tunnel to reach the node.
Claim 18
Dependent Claim
17 words
The device according to claim 16 , wherein the first hot-carrier diode comprises a second tunnel barrier.
Claim 19
Dependent Claim
16 words
The device according to claim 17 , wherein the first and second tunnel barriers are unitary.
Claim 20
Dependent Claim
17 words
The device according to claim 17 , wherein the second hot-carrier diode comprises a third tunnel barrier.
Claim 21
Dependent Claim
18 words
The device according to claim 19 , wherein the first barrier, second and third tunnel barriers are unitary.
Claim 22
Dependent Claim
15 words
The device according to claim 18 , wherein the unitary barrier has a uniform thickness.
Claim 23
Dependent Claim
15 words
The device according to claim 21 , wherein the unitary tunnel barrier comprises silicon dioxide.
Claim 24
Dependent Claim
15 words
The device according to claim 21 , wherein the unitary tunnel barrier comprises silicon nitride.
Claim 25
Dependent Claim
15 words
The device according to claim 21 , wherein the unitary tunnel barrier comprises silicon oxynitride.
Claim 26
Dependent Claim
21 words
The device according to claim 21 , wherein the thickness of the unitary tunnel barrier is between 2 and 10 nm.
Claim 27
Dependent Claim
21 words
The device according to claim 19 , wherein said charge carriers leave the node via the second or third tunnel barrier.
Claim 28
Dependent Claim
19 words
The device according to claim 19 , wherein said charge carriers enter the node via the first tunnel barrier.
Claim 29
Dependent Claim
20 words
The device according to claim 16 , wherein the first tunnel barrier is disposed between said node and said path.
Claim 30
Dependent Claim
21 words
The device according to claim 1 , wherein charge carriers pass onto said node in response to a different voltage configuration.
Claim 31
Dependent Claim
22 words
The device according to claim 27 further comprising a first tunnel barrier through which charge carriers may tunnel to reach the node.
Claim 32
Dependent Claim
20 words
The device according to claim 30 , wherein said charge carriers pass though the first tunnel barrier from said path.
Claim 33
Dependent Claim
16 words
The device according to claim 1 , wherein the first hot-carrier diode comprises a diffusion barrier.
Claim 34
Dependent Claim
14 words
The device according to claim 32 , wherein the diffusion barrier comprises silicon nitride.
Claim 35
Dependent Claim
20 words
The device according to claim 32 , wherein the thickness of the diffusion barrier is between 0.5 and 3 nm.
Claim 36
Dependent Claim
16 words
The device according to claim 1 , wherein the hot-carrier diodes and the node are unitary.
Claim 37
Dependent Claim
83 words
A memory device comprising: a path for charge carriers; a node for storing charge carriers to produce a field which alters the conductivity of the path and first and second hot-carrier diodes for converting stored charge carriers into hot; charge carriers so as to allow said charge carriers to leave said node and enter said source or drain regions in response to a given voltage configuration and configured to prevent charge carriers from leaving said node in the absence of said voltage configuration.
Claim 38
Dependent Claim
83 words
A memory device comprising: a path for charge carriers; a node for storing charge carriers to produce a field which alters the conductivity of the path and first and second hot-carrier diodes for converting stored charge carriers into hot; charge carriers so as to allow said charge carriers to leave said node and enter said source or drain regions in response to a given voltage configuration and configured to prevent charge carriers from leaving said node in the absence of said voltage configuration.
Claim 39
Dependent Claim
85 words
A memory device comprising: a channel for charge carriers; a node for storing charge carriers to produce a field which alters the conductivity of the channel, a tunnel barrier disposed between said node and said path, for preventing charge carriers from entering or leaving said node, the improvement comprising a hot-carrier diode for additionally preventing charge from tunnelling from said channel to said node and said tunnel barrier being sufficiently thin to allow said node to be both charged and discharged on a sub-microsecond timescale.
Claim 40
Dependent Claim
85 words
A memory device comprising: a channel for charge carriers; a node for storing charge carriers to produce a field which alters the conductivity of the channel, a tunnel barrier disposed between said node and said path, for preventing charge carriers from entering or leaving said node, the improvement comprising a hot-carrier diode for additionally preventing charge from tunnelling from said channel to said node and said tunnel barrier being sufficiently thin to allow said node to be both charged and discharged on a sub-microsecond timescale.
Claim 41
Dependent Claim
28 words
The device according to claim 36 , wherein said tunnel barrier is sufficiently thin to allow said node to be both charged and discharged in approximately 100 ns.
Claim 42
Dependent Claim
76 words
A memory device comprising: a channel for charge carriers; a node for storing charge carriers to produce a field which alters the conductivity of the channel, a tunnel barrier disposed between said node and said path for preventing charge carriers from entering or leaving said node, the improvement comprising a hot-carrier diode for additionally preventing charge from tunnelling from said channel to said node and said tunnel barrier having a thickness between 2 to 10 nm.
Claim 43
Dependent Claim
76 words
A memory device comprising: a channel for charge carriers; a node for storing charge carriers to produce a field which alters the conductivity of the channel, a tunnel barrier disposed between said node and said path for preventing charge carriers from entering or leaving said node, the improvement comprising a hot-carrier diode for additionally preventing charge from tunnelling from said channel to said node and said tunnel barrier having a thickness between 2 to 10 nm.
Claim 44
Dependent Claim
16 words
The device according to claim 38 , wherein said tunnel barrier is approximately 4 nm thick.
Claim 45
Dependent Claim
14 words
The device according to claim 39 , wherein said tunnel barrier comprises silicon dioxide.
Claim 46
Dependent Claim
99 words
A memory device comprising: a path for charge carriers; source and drain regions disposed at either end of the path; a node for storing charge carriers to produce a field which alters the conductivity of the path; and first and second hot-carrier diodes each for converting stored charge carriers into hot charge carriers inside said node so as to allow said charge carriers to leave said node and enter said source or drain regions in response to a given voltage configuration and for preventing charge carriers entering said source and drain regions in the absence of said voltage configuration.
Claim 47
Dependent Claim
99 words
A memory device comprising: a path for charge carriers; source and drain regions disposed at either end of the path; a node for storing charge carriers to produce a field which alters the conductivity of the path; and first and second hot-carrier diodes each for converting stored charge carriers into hot charge carriers inside said node so as to allow said charge carriers to leave said node and enter said source or drain regions in response to a given voltage configuration and for preventing charge carriers entering said source and drain regions in the absence of said voltage configuration.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2006-06-02 | 2006-12-02 | 2007-06-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2010-06-02 | 2010-12-02 | 2011-06-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2014-06-02 | 2014-12-02 | 2015-06-03 | $7700.00 | Window Closed / Lapsed |