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US6553449B1
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System and method for providing concurrent row and column commands
Assignee: Intel Corp
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Filing: 2000-09-29
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Granted: 2003-04-22
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Expires: 2020-09-29
Abstract
Abstract A system and method for providing concurrent column and row operations in a memory system is provided. The memory system includes a memory controller, a plurality of memory devices, and communication paths between the memory controller and the plurality of memory devices. The memory controller is coupled to each memory device through a communication path that provides a column chip select signal to the memory device and a communication path that provides a row chip select signal to the memory device. The dual chip select signals allow a column operation to be carried out in the memory device simultaneously with a row operation in the memory device. The communication paths further include a column command communication path that provides column commands to the memory devices, a column address communication path that provides column addresses for the column commands to the memory devices, a row command communication path that provides row commands to the memory devices, and a row address communication path that provides row addresses for the row commands to the memory device.
Inventors
- 👤 James M. Dodd
- 👤 Michael W. Williams
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 11:49
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/14; G06F13/16; G06F13/1668; G06F13/1684; G06F12/00; Y; Y02; Y02D; Y02D10/00
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
118 words
A memory system, comprising: a memory controller that sends data and signals to at least one memory device and receives data and signals from the at least one memory device; an external buffer interconnecting the memory controller and the at least one memory device to transfer data and signals between the memory controller and the at least one memory device; a first selecting communication path that provides a first selecting signal to the at least one memory device for selection to carry out a column command; and a second selecting communication path that provides a second selecting signal to the at least one memory device for selection to simultaneously carry out a row command with the column operation.
Claim 2
Dependent Claim
118 words
A memory system, comprising: a memory controller that sends data and signals to at least one memory device and receives data and signals from the at least one memory device; an external buffer interconnecting the memory controller and the at least one memory device to transfer data and signals between the memory controller and the at least one memory device; a first selecting communication path that provides a first selecting signal to the at least one memory device for selection to carry out a column command; and a second selecting communication path that provides a second selecting signal to the at least one memory device for selection to simultaneously carry out a row command with the column operation.
Claim 3
Dependent Claim
70 words
The memory system of claim 1 , further comprising a column command communication path that provides column commands to the memory device; a column address communication path that provides column addresses for the column commands to the memory device; a row command communication path that provides row commands to the memory device; and a row address communication path that provides row addresses for the row commands to the memory device.
Claim 4
Dependent Claim
56 words
The memory system of claim 1 , wherein the at least one memory device having the memory cell array is referred to as a rank, and the at least one memory device is further divided into a plurality of sub-arrays referred to as banks, the rank having at least a first bank and a second bank.
Claim 5
Dependent Claim
60 words
The memory system of claim 3 , wherein the first selecting communication path provides a first selecting signal to the rank for carrying out a column command in the first bank, and the second selecting communication path provides a second selecting signal to the rank for simultaneously carrying out a row command in the second bank with the column operation.
Claim 6
Dependent Claim
39 words
The memory system of claim 1 , wherein the column commands include a read command for reading data from the at least one memory device and a write command for writing data to the at least one memory device.
Claim 7
Dependent Claim
77 words
The memory system of claim 1 , wherein the row commands include a pre-charge command for pre-charging the at least one memory device, or a portion thereof, an activate command for activating a portion of the at least one memory device, a power-down command for moving the at least one memory device, or a portion thereof, to a lower power state, and a self-refresh command for refreshing the at least one memory device, or a portion thereof.
Claim 8
Independent Claim
189 words
A method of providing concurrent row and column commands in a memory system including a memory controller and at least one memory device having a memory cell array, the method comprising: selecting the at least one memory device for carrying out a column operation in the memory cell array; selecting the at least one memory device for simultaneously carrying out a row operation in the memory cell array With the column operation; providing column commands for the column operation to the at least one memory device through an external buffer interconnecting the memory controller and the at least one memory device; providing column addresses for the column commands to the at least one memory device through the external buffer interconnecting the memory controller and the at least one memory device; providing row commands for the row operation to the at least one memory device through the external buffer interconnecting the memory controller and the at least one memory device; and providing row addresses for the row commands to the at least one memory device through the external buffer interconnecting the memory controller and the at least one memory device.
Claim 9
Independent Claim
189 words
A method of providing concurrent row and column commands in a memory system including a memory controller and at least one memory device having a memory cell array, the method comprising: selecting the at least one memory device for carrying out a column operation in the memory cell array; selecting the at least one memory device for simultaneously carrying out a row operation in the memory cell array With the column operation; providing column commands for the column operation to the at least one memory device through an external buffer interconnecting the memory controller and the at least one memory device; providing column addresses for the column commands to the at least one memory device through the external buffer interconnecting the memory controller and the at least one memory device; providing row commands for the row operation to the at least one memory device through the external buffer interconnecting the memory controller and the at least one memory device; and providing row addresses for the row commands to the at least one memory device through the external buffer interconnecting the memory controller and the at least one memory device.
Claim 10
Dependent Claim
99 words
The method of claim 7 , wherein the at least one memory device includes a plurality of memory devices, each memory device being coupled to the memory controller by a first selecting communication path and a second selecting communication path, the first selecting communication path providing a first selecting signal to the memory device for selection to carry out a column command in its memory cell array, the second selecting communication path providing a second selecting signal to the memory device for selection to simultaneously carry out a row command in its memory cell array with the column operation.
Claim 11
Dependent Claim
55 words
The method of claim 7 , wherein the at least one memory device having the memory cell array is referred to as a rank, and the at least one memory device is further divided into a plurality of sub-arrays referred to as banks, the rank having at least a first bank and a second bank.
Claim 12
Dependent Claim
34 words
The memory system of claim 9 , wherein the column operation is carried out in the first bank of the memory device and the simultaneous row operation is carried out in the second bank.
Claim 13
Dependent Claim
39 words
The memory system of claim 7 , wherein the column commands include a read command for reading data from the at least one memory device and a write command for writing data to the at least one memory device.
Claim 14
Dependent Claim
77 words
The memory system of claim 7 , wherein the row commands include a pre-charge command for pre-charging the at least one memory device, or a portion thereof, an activate command for activating a portion of the at least one memory device, a power-down command for moving the at least one memory device, or a portion thereof, to a lower power state, and a self-refresh command for refreshing the at least one memory device, or a portion thereof.
Claim 15
Dependent Claim
196 words
A computer readable medium for use in conjunction with a memory system including a memory controller and at least one memory device having a memory cell array, the computer readable medium including computer readable instructions encoded thereon for: selecting the at least one memory device for carrying out a column operation in the memory cell array; selecting the at least one memory device for simultaneously carrying out a row operation in the memory cell array with the column operation; providing column commands for the column operation. to the at least one memory device through an external buffer interconnecting the memory controller and the at least one memory device; providing column addresses for the column commands to the at least one memory device through the external buffer interconnecting the memory controller and the at least one memory device; providing row commands for the row operation to the at least one memory device through the external buffer interconnecting the memory controller and the at least one memory device; and providing row addresses for the row commands to the at least one memory device through the external buffer interconnecting the memory controller and the at least one memory device.
Claim 16
Dependent Claim
196 words
A computer readable medium for use in conjunction with a memory system including a memory controller and at least one memory device having a memory cell array, the computer readable medium including computer readable instructions encoded thereon for: selecting the at least one memory device for carrying out a column operation in the memory cell array; selecting the at least one memory device for simultaneously carrying out a row operation in the memory cell array with the column operation; providing column commands for the column operation. to the at least one memory device through an external buffer interconnecting the memory controller and the at least one memory device; providing column addresses for the column commands to the at least one memory device through the external buffer interconnecting the memory controller and the at least one memory device; providing row commands for the row operation to the at least one memory device through the external buffer interconnecting the memory controller and the at least one memory device; and providing row addresses for the row commands to the at least one memory device through the external buffer interconnecting the memory controller and the at least one memory device.
Claim 17
Dependent Claim
101 words
The computer readable medium of claim 13 , wherein the at least one memory device includes a plurality of memory devices, each memory device being coupled to the memory controller by a first selecting communication path and a second selecting communication path, the first selecting communication path providing a first selecting signal to the memory device for selection to carry out a column command in its memory cell array, the second selecting communication path providing a second selecting signal to the memory device for selection to simultaneously carry out a row command in its memory cell array with the column operation.
Claim 18
Dependent Claim
57 words
The computer readable medium of claim 13 , wherein the at least one memory device having the memory cell array is referred to as a rank, and the at least one memory device is further divided into a plurality of sub-arrays referred to as banks, the rank having at least a first bank and a second bank.
Claim 19
Dependent Claim
35 words
The computer readable medium of claim 15 , wherein the column operation is carried out in the first bank of the memory device and the simultaneous row operation is carried out in the second bank.
Claim 20
Dependent Claim
40 words
The computer readable medium of claim 13 , wherein the column commands include a read command for reading data from the at least one memory device and a write command for writing data to the at least one memory device.
Claim 21
Dependent Claim
78 words
The computer readable medium of claim 13 , wherein the row commands include a pre-charge command for pre-charging the at least one memory device, or a portion thereof, an activate command for activating a portion of the at least one memory device, a power-down command for moving the at least one memory device, or a portion thereof, to a lower power state, and a self-refresh command for refreshing the at least one memory device, or a portion thereof.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2006-04-21 | 2006-10-21 | 2007-04-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2010-04-21 | 2010-10-21 | 2011-04-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2014-04-21 | 2014-10-21 | 2015-04-22 | $7700.00 | Window Closed / Lapsed |