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US6538332B2 Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor device and method of production of same

Assignee: Shinko Electric Industries Co Ltd
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Filing: 2001-10-09
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Granted: 2003-03-25
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Expires: 2021-10-09
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Abstract

Abstract A semiconductor device thinner than the past and improved in reliability of electrical connection between semiconductor chips and an interconnection substrate including a polyimide film (insulating plastic film) formed with stud bump through holes, an interconnection pattern formed on one surface of the polyimide film and covering openings of the stud bump through holes at least at that one surface, a first semiconductor chip flip-chip bonded to the interconnection pattern, a second semiconductor chip flip-chip bonded to the other surface of the polyimide film so as to be electrically connected with the interconnection pattern through the stud bump through holes, and solder bumps (external connection terminals) and a method for production of the same by fewer steps than in the past.

Inventors

  • 👤 Kei Murayama
  • 👤 Mitsutoshi Higashi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 12:24
CPC Classifications
H; H10; H10W; H10W90/00; H10W70/00; H10W70/60; H10W72/00; H10W72/01; H10W72/012; H10W72/01221; H10W72/01225; H10W72/0198; H10W72/20; H10W72/251; H10W72/252; H10W74/00; H10W74/10; H10W74/15; H10W90/20; H10W90/22; H10W90/291; H10W90/297; H10W90/701; H10W90/721; H10W90/724; H10W90/731; H10W90/734

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 94 words
A semiconductor device comprising: an insulating plastic film formed with through holes; an interconnection pattern formed on one surface of said plastic film and covering openings of said through holes at least at said one surface; a first semiconductor chip flip-chip bonded on said interconnection pattern so as to be electrically connected with said interconnection pattern; a second semiconductor chip flip-chip bonded on the other surface of said plastic film so as to be electrically connected with said interconnection pattern through said through holes; and external connection terminals electrically connected with said interconnection pattern.
Claim 2
Dependent Claim 94 words
A semiconductor device comprising: an insulating plastic film formed with through holes; an interconnection pattern formed on one surface of said plastic film and covering openings of said through holes at least at said one surface; a first semiconductor chip flip-chip bonded on said interconnection pattern so as to be electrically connected with said interconnection pattern; a second semiconductor chip flip-chip bonded on the other surface of said plastic film so as to be electrically connected with said interconnection pattern through said through holes; and external connection terminals electrically connected with said interconnection pattern.
Claim 3
Dependent Claim 33 words
A semiconductor device as set forth in claim 1 , wherein said first semiconductor chip and said second semiconductor chip are arranged shifted from each other so that they do not completely overlap.
Claim 4
Dependent Claim 39 words
A semiconductor device as set forth in claim 2 , wherein a stress-cancellation plate is fixed at the region where the first semiconductor chip and the second semiconductor chip do not overlap on either surface of said plastic film.
Claim 5
Dependent Claim 35 words
A semiconductor device as set forth in any one of claims 1 to 3 , wherein a first semiconductor chip and second semiconductor chip having the same functions and same electrode terminal array are used.
Claim 6
Dependent Claim 34 words
A semiconductor device as set forth in any one of claims 1 to 3 , wherein a reinforcement plate is affixed to an edge region of one of the surfaces of said plastic film.
Claim 7
Dependent Claim 29 words
A semiconductor device as set forth in claim 4 , wherein a reinforcement plate is affixed to an edge region of one of the surfaces of said plastic film.

References Cited (Backward Citations)

JPH0482937A Cited
US5821614A Cited
US6407451B2 Cited
US6104088A Cited
US6281042B1 Cited
US6239496B1 Cited
US6353420B1 Cited
US6429511B2 Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2006-03-24 2006-09-23 2007-03-25 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2010-03-24 2010-09-23 2011-03-25 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2014-03-24 2014-09-23 2015-03-25 $7700.00 Window Closed / Lapsed

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