Electronic package and method of forming

Claim 1

An electronic package, comprising: a circuitized substrate having an upper surface; a semiconductor chip mounted on said upper surface of said circuitized substrate and electrically coupled to said substrate, said semiconductor chip having a substantially planar upper surface and at least one edge surface being substantially perpendicular to said substantially planar upper surface, said planar upper surface of said semiconductor chip having a defined area thereon, said defined area of said planar upper surface being less than the entirety of said planar upper surface of said semiconductor chip; a thermally conductive member having upper and lower surfaces, said lower surface of said thermally conductive member thermally coupled to said substantially planar upper surface of said semiconductor chip, said thermally conductive member further having at least one edge surface extending around a defined perimeter of said thermally conductive member, said thermally conductive member further including a body portion and a projecting portion, said projecting portion of said thermally conductive member including a first plurality of openings and/or recesses therein and said body portion including a second plurality of openings and/or recesses therein, wherein each of said first plurality of openings and/or recesses include a first cross sectional area and each of said second plurality of openings and/or recesses include a second cross sectional area, said first cross sectional area of each of said first plurality of openings and/or recesses being greater than said second cross sectional area of each of said second plurality of openings and/or recesses, said projecting portion of said thermally conductive member substantially surrounding said body portion of said thermally conductive member, said body portion located substantially directly over said defined area of said planar upper surface of said semiconductor chip and having a bending stiffiness greater than the bending stiffiniess of said projecting portion; and a substantially rigid dielectric material positioned on at least a portion of said upper surface of said circuitized substrate and extending along at least a portion of said at least one edge surface of said thermally conductive member and extending along at least a portion of said at least one edge surface of said semiconductor chip.