Patent US6452270B1 successfully refreshed from Google Patents.
← Back to Patent Explorer
US6452270B1 Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor device having bump electrode

Assignee: Advanced Semiconductor Engineering Inc
•
Filing: 2001-01-19
•
Granted: 2002-09-17
•
Expires: 2021-01-19
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A semiconductor device having bump electrodes mainly comprises a specialized under bump metallurgy (UBM) applied to a chip with copper contact pads. Typically, the chip comprises a substrate and at least one copper contact pad on the substrate. A passivation layer is formed over the substrate and has an opening positioned over the al least one copper contact pad. The UBM includes a titanium layer, a first copper layer, a nickel-vanadium layer and a second copper layer. The titanium layer forms a closed-loop surrounding the opening of the dielectric layer. The first copper layer is formed over the titanium layer and the opening of the dielectric layer such that the first copper layer directly contacts the copper contact pad. The nickel-vanadium layer is formed on the first copper layer and the second copper layer is formed on the nickel-vanadium layer. A metal bump is provided on the UBM over the copper contact pad thereby forming a bump electrode. The UBM of the present invention is characterized by using the titanium layer with a closed-loop shape as the adhesion layer to significantly increase the adhesion between the UBM and the passivation layer, and using the first copper layer, which is directly contacted with the copper contact pad, to provide a better electrical performance.

Inventors

  • 👤 Min-Lung Huang

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 22:52
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/90; H10W72/01; H10W72/012; H10W72/019; H10W72/20; H10W72/241; H10W72/244; H10W72/251; H10W72/252; H10W72/29; H10W72/921; H10W72/923; H10W72/931; H10W72/934; H10W72/941; H10W72/9415; H10W72/942; H10W72/951; H10W72/952; H10W72/981; H10W72/983

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 120 words
A semiconductor device having a bump electrode comprising: a substrate having a copper contact pad; a dielectric layer formed over the substrate, the dielectric layer having a first opening positioned over the copper contact pad; a titanium layer on the dielectric layer wherein the titanium layer has a second opening corresponding to the first opening of the dielectric layer; a first copper layer being formed on the titanium layer and directly contacting the copper contact pad through the first opening of the dielectric layer and the second opening of the titanium layer; a nickel-vanadium layer formed on the first copper layer; a second copper layer formed on the nickel-vanadium layer; and a metal bump provided on the second copper layer.
Claim 2
Dependent Claim 120 words
A semiconductor device having a bump electrode comprising: a substrate having a copper contact pad; a dielectric layer formed over the substrate, the dielectric layer having a first opening positioned over the copper contact pad; a titanium layer on the dielectric layer wherein the titanium layer has a second opening corresponding to the first opening of the dielectric layer; a first copper layer being formed on the titanium layer and directly contacting the copper contact pad through the first opening of the dielectric layer and the second opening of the titanium layer; a nickel-vanadium layer formed on the first copper layer; a second copper layer formed on the nickel-vanadium layer; and a metal bump provided on the second copper layer.
Claim 3
Dependent Claim 17 words
The semiconductor device as claimed in claim 1 , wherein the dielectric layer is a passivation layer.
Claim 4
Dependent Claim 17 words
The semiconductor device as claimed in claim 1 , wherein the metal bump is a gold bump.
Claim 5
Dependent Claim 17 words
The semiconductor device as claimed in claim 1 , wherein the metal bump is a solder bump.
Claim 6
Dependent Claim 176 words
A semiconductor device having a bump electrode comprising: a substrate having a copper contact pad; a first dielectric layer formed over the substrate, the first dielectric layer having a first opening positioned over the copper contact pad; a multi-layered lead having a first end portion connected to the copper contact pad through the first opening and a second end portion extending on the first dielectric layer; the multi-layered lead including a first titanium layer on the first dielectric layer, a copper layer on the first titanium layer and a second titanium layer on the copper layer wherein the first titanium layer has a second opening corresponding to the first opening and the copper layer directly contacts the copper contact pad through the second opening and the first opening; a second dielectric layer formed over the multi-layered lead and the first dielectric layer, the second dielectric layer having a blind-via formed corresponding to the second end portion of the multi-layered lead; a conductive pad formed over the blind-via; and a metal bump provided on the conductive pad.
Claim 7
Dependent Claim 176 words
A semiconductor device having a bump electrode comprising: a substrate having a copper contact pad; a first dielectric layer formed over the substrate, the first dielectric layer having a first opening positioned over the copper contact pad; a multi-layered lead having a first end portion connected to the copper contact pad through the first opening and a second end portion extending on the first dielectric layer; the multi-layered lead including a first titanium layer on the first dielectric layer, a copper layer on the first titanium layer and a second titanium layer on the copper layer wherein the first titanium layer has a second opening corresponding to the first opening and the copper layer directly contacts the copper contact pad through the second opening and the first opening; a second dielectric layer formed over the multi-layered lead and the first dielectric layer, the second dielectric layer having a blind-via formed corresponding to the second end portion of the multi-layered lead; a conductive pad formed over the blind-via; and a metal bump provided on the conductive pad.
Claim 8
Dependent Claim 18 words
The semiconductor device as claimed in claim 5 , wherein the first dielectric layer is a passivation layer.
Claim 9
Dependent Claim 30 words
The semiconductor device as claimed in claim 5 , wherein the conductive pad comprises a nickel-vanadium layer formed over the blind-via and a copper layer formed on the nickel-vanadium layer.
Claim 10
Dependent Claim 17 words
The semiconductor device as claimed in claim 5 , wherein the metal bump is a gold bump.
Claim 11
Dependent Claim 17 words
The semiconductor device as claimed in claim 5 , wherein the metal bump is a solder bump.

References Cited (Backward Citations)

US4514751A Cited
US6111321A Cited
US5631499A Cited
US6111317A Cited
US5903058A Cited
US5925931A Cited
US6287893B1 Cited
US6075290A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2005-09-16 2006-03-18 2006-09-17 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2009-09-16 2010-03-18 2010-09-17 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2013-09-16 2014-03-18 2014-09-17 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag