US6452229B1
Expired / Lapsed
US
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Ultra-thin fully depleted SOI device with T-shaped gate and method of fabrication
Assignee: Advanced Micro Devices Inc
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Filing: 2002-02-21
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Granted: 2002-09-17
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Expires: 2022-02-21
Abstract
Abstract A fully depleted semiconductor-on-insulator (SOI) field effect transistor (FET) and methods of formation. The FET includes a T-shaped gate formed at least in part in a recess formed in a layer of semiconductor material and over a body region that is disposed between a source and a drain. The gate includes a gate electrode spaced apart from the body by a gate dielectric made from a high-K material.
Inventors
- 👤 Zoran Krivokapic
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 02:23
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/67; H10D30/6757; H10D30/01; H10D30/021; H10D30/031; H10D30/0321; H10D30/0323; H10D30/6729; H10D30/673; H10D30/6737; H10D30/6739
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
182 words
A fully depleted semiconductor-on-insulator (SOI) field effect transistor (FET), comprising: a layer of semiconductor material disposed over an insulating layer, the insulating layer disposed over a semiconductor substrate; a source and a drain formed from the layer of semiconductor material; a body formed from the layer of semiconductor material and disposed between the source and the drain, wherein the layer of semiconductor material is etched such that a thickness of the body is less than a thickness of the source and the drain and such that a recess is formed in the layer of semiconductor material over the body; and a T-shaped gate having a center region formed at least in part in the recess and a pair of upper arms extending laterally from the center region, the upper arms respectively extending toward a source side of the FET and a drain side of the FET, the arms formed over a configuring layer, the gate defining a channel in the body, and the gate including a gate electrode spaced apart from the body by a gate dielectric made from a high-K material.
Claim 2
Dependent Claim
182 words
A fully depleted semiconductor-on-insulator (SOI) field effect transistor (FET), comprising: a layer of semiconductor material disposed over an insulating layer, the insulating layer disposed over a semiconductor substrate; a source and a drain formed from the layer of semiconductor material; a body formed from the layer of semiconductor material and disposed between the source and the drain, wherein the layer of semiconductor material is etched such that a thickness of the body is less than a thickness of the source and the drain and such that a recess is formed in the layer of semiconductor material over the body; and a T-shaped gate having a center region formed at least in part in the recess and a pair of upper arms extending laterally from the center region, the upper arms respectively extending toward a source side of the FET and a drain side of the FET, the arms formed over a configuring layer, the gate defining a channel in the body, and the gate including a gate electrode spaced apart from the body by a gate dielectric made from a high-K material.
Claim 3
Dependent Claim
19 words
The FET according to claim 1 , wherein the body has a thickness of less than about 50 Å.
Claim 4
Dependent Claim
19 words
The FET according to claim 1 , wherein a spacer is formed adjacent each sidewall of the gate electrode.
Claim 5
Dependent Claim
19 words
The FET according to claim 3 , wherein each spacer is formed at least in part in the recess.
Claim 6
Dependent Claim
15 words
The FET according to claim 3 , wherein each spacer is formed from a nitride.
Claim 7
Dependent Claim
23 words
The FET according to claim 3 , wherein the spacers are respectively separated from the source and the drain by an oxide layer.
Claim 8
Dependent Claim
20 words
The FET according to claim 3 , wherein the spacers are separated from the gate electrode by the gate dielectric.
Claim 9
Dependent Claim
18 words
The FET according to claim 1 , wherein the gate electrode is formed from a metal containing material.
Claim 10
Dependent Claim
16 words
The FET according to claim 1 , wherein the configuring layer is made from a nitride.
Claim 11
Dependent Claim
27 words
The FET according to claim 1 , wherein the configuring layer is patterned to have a pair of structural surfaces upon which the arms are respectively formed.
Claim 12
Dependent Claim
24 words
The FET according to claim 1 , wherein the source and the drain are silicided to form a source contact and a drain contact.
Claim 13
Dependent Claim
24 words
The FET according to claim 1 , wherein the high-K material of the gate dielectric has a relative permittivity of greater than about 20.
Claim 14
Dependent Claim
42 words
The FET according to claim 1 , wherein the high-K material of the gate dielectric is composed of one or more materials selected from hafnium oxide, zirconium oxide, cerium oxide, aluminum oxide, titanium oxide, yttrium oxide, barium strontium titanate and mixtures thereof.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2005-09-16 | 2006-03-18 | 2006-09-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2009-09-16 | 2010-03-18 | 2010-09-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2013-09-16 | 2014-03-18 | 2014-09-17 | $7700.00 | Window Closed / Lapsed |