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US6440834B2 Expired / Lapsed US ⏱️ 0.0 years remaining

Method and structure for a semiconductor fuse

Assignee: GlobalFoundries Inc
•
Filing: 2001-04-06
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Granted: 2002-08-27
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Expires: 2021-04-06
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Abstract

Abstract A semiconductor fuse structure having a conductive fuse material abutting a first and second conductive line is provided. The fuse of the present invention does not substantially damage the surrounding semiconductor material therefore it can be used with a wide variety of materials including porous, mechanically fragile, low dielectric constant materials and high conductive metals like Cu. Methods of fabricating such a semiconductor fuse structure are also provided herein.

Inventors

  • 👤 Timothy Harrison Daubenspeck
  • 👤 William Thomas Motsiff
  • 👤 Jed Hickory Rankin

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 05:52
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/49; H10W20/493; H10W20/494

Claims Analysis

Total Claims: 31
Claim 1
Independent Claim 152 words
A method of forming a semiconductor fuse structure comprising the steps of: (a) providing a semiconductor structure, said structure comprising at least one wiring level formed on a semiconductor substrate; (b) forming a first dielectric layer having an upper surface on a surface of said semiconductor structure; (c) forming first and second conductive lines in said first dielectric layer, each conductive line having an end and a top surface that is coplanar with said upper surface of said first dielectric layer, said ends being in proximity to each other, (d) forming a second dielectric layer on said first dielectric layer covering said first and second conductive lines; (e) forming a hole in said second dielectric layer, said hole at least exposing a portion of said first and second conductive lines; and (f) filling said hole with a conductive fuse material to provide an electrical connection between said first and second conductive lines.
Claim 2
Independent Claim 152 words
A method of forming a semiconductor fuse structure comprising the steps of: (a) providing a semiconductor structure, said structure comprising at least one wiring level formed on a semiconductor substrate; (b) forming a first dielectric layer having an upper surface on a surface of said semiconductor structure; (c) forming first and second conductive lines in said first dielectric layer, each conductive line having an end and a top surface that is coplanar with said upper surface of said first dielectric layer, said ends being in proximity to each other, (d) forming a second dielectric layer on said first dielectric layer covering said first and second conductive lines; (e) forming a hole in said second dielectric layer, said hole at least exposing a portion of said first and second conductive lines; and (f) filling said hole with a conductive fuse material to provide an electrical connection between said first and second conductive lines.
Claim 3
Dependent Claim 31 words
The method of claim 1 wherein said semiconductor substrate is a semiconducting material selected from the group consisting of Si, Ge, SiGe, GaAs, InAs, InP, other III/V compounds and organic semiconductors.
Claim 4
Dependent Claim 47 words
The method of claim 1 wherein said first and second dielectric layers are composed of the same or different dielectric material selected from the group consisting of SiO 2 , Si 3 N 4 , SiCOH, diamond, diamond-like carbon, paralyene polymers, polyimides, silicon-containing polymers and porous glass.
Claim 5
Dependent Claim 18 words
The method of claim 1 wherein a barrier layer is formed between the first and second dielectric layers.
Claim 6
Dependent Claim 28 words
The method of claim 1 wherein said first and second conductive lines are composed of a noble metal, noble metal oxide, conductive oxide or mixtures and multilayers thereof.
Claim 7
Dependent Claim 19 words
The method of claim 1 wherein said hole is formed by lithography and reactive ion etching or laser ablation.
Claim 8
Dependent Claim 32 words
The method of claim 1 wherein said hole extends to the top surface of said first and second conductive lines or extends between said ends of said first and second conductive lines.
Claim 9
Dependent Claim 36 words
The method of claim 1 further comprising forming a passivating layer after step (f) and thereafter patterning said passivating layer by lithography and RIE or laser ablation to provide a window above said conductive fuse material.
Claim 10
Dependent Claim 19 words
The method of claim 1 wherein said wiring level comprises an interlevel dielectric layer having conductive regions formed therein.
Claim 11
Dependent Claim 14 words
The method of claim 1 wherein said conductive fuse material comprises a conductive polymer.
Claim 12
Dependent Claim 22 words
The method of claim 1 further comprising forming an optional barrier layer on said second dielectric layer prior to opening said hole.
Claim 13
Dependent Claim 23 words
The method of claim 9 wherein said conductive region comprises a noble metal, noble metal oxide, conductive oxide or mixtures and multilayers thereof.
Claim 14
Dependent Claim 17 words
The method of claim 10 wherein said conductive polymer comprises a polyaniline, a polypyrrole or a polyalkylthiophene.
Claim 15
Dependent Claim 11 words
The method of claim 13 wherein said conductive polymer is doped.
Claim 16
Dependent Claim 53 words
The method of claim 11 , wherein said hole is provided in one step or multiple steps wherein a portion of said optional barrier layer is first removed by lithography and RIE or laser ablation and thereafter a portion of said second dielectric layer is removed by lithography and RIE or laser ablation.
Claim 17
Independent Claim 178 words
A method of forming a semiconductor fuse structure comprising the steps of: (a) providing a semiconductor structure, said structure comprising at least one wiring level formed on a semiconductor substrate; (b) forming a first dielectric layer having an upper surface on a surface of said semiconductor substrate; (c) forming at least one electrically connected conductive line having a top surface that is coplanar with said upper surface of said first dielectric layer in said first dielectric layer, said at least one electrically connected conductive line having no gaps; (d) forming a second dielectric layer on said first dielectric layer covering said at least one electrically connected conductive line; (f) forming a hole in said second dielectric layer, said hole bisecting said at least one electrically conned conductive line into a first non-electrically connected conductive line and a second non-electrically connected conductive line, each line having an end, wherein said ends are in proximity to each other; and (g) filling said hole with a conductive fuse material to provide an electrical connection between the first and second conductive lines.
Claim 18
Independent Claim 178 words
A method of forming a semiconductor fuse structure comprising the steps of: (a) providing a semiconductor structure, said structure comprising at least one wiring level formed on a semiconductor substrate; (b) forming a first dielectric layer having an upper surface on a surface of said semiconductor substrate; (c) forming at least one electrically connected conductive line having a top surface that is coplanar with said upper surface of said first dielectric layer in said first dielectric layer, said at least one electrically connected conductive line having no gaps; (d) forming a second dielectric layer on said first dielectric layer covering said at least one electrically connected conductive line; (f) forming a hole in said second dielectric layer, said hole bisecting said at least one electrically conned conductive line into a first non-electrically connected conductive line and a second non-electrically connected conductive line, each line having an end, wherein said ends are in proximity to each other; and (g) filling said hole with a conductive fuse material to provide an electrical connection between the first and second conductive lines.
Claim 19
Dependent Claim 31 words
The method of claim 16 wherein said semiconductor substrate is a semiconducting material selected from the group consisting of Si, Ge, SiGe, GaAs, InAs, InP, other III/V compounds and organic semiconductors.
Claim 20
Dependent Claim 47 words
The method of claim 16 wherein said first and second dielectric layers are composed of the same or different dielectric material selected from the group consisting of SiO 2 , Si 3 N 4 , SiCOH, diamond, diamond-like carbon, paralyene polymers, polyimides, silicon-containing polymers and porous glass.
Claim 21
Dependent Claim 18 words
The method of claim 16 wherein a barrier layer is formed between the first and second dielectric layers.
Claim 22
Dependent Claim 29 words
The method of claim 16 wherein said electrically conductive line having no gaps is composed of a noble metal, noble metal oxide, conductive oxide or mixtures and multilayers thereof.
Claim 23
Dependent Claim 19 words
The method of claim 16 wherein said hole is formed by lithography and reactive ion etching or laser ablation.
Claim 24
Dependent Claim 36 words
The method of claim 16 further comprising forming a passivating layer after step (f) and thereafter patterning said passivating layer by lithography and RIE or laser ablation to provide a window above said conductive fuse material.
Claim 25
Dependent Claim 19 words
The method of claim 16 wherein said wiring level comprises an interlevel dielectric layer having conductive regions formed therein.
Claim 26
Dependent Claim 14 words
The method of claim 16 wherein said conductive fuse material comprises a conductive polymer.
Claim 27
Dependent Claim 22 words
The method of claim 16 further comprising forming an optional barrier layer on said second dielectric layer prior to opening said hole.
Claim 28
Dependent Claim 23 words
The method of claim 23 wherein said conductive region comprises a noble metal, noble metal oxide, conductive oxide or mixtures and multilayers thereof.
Claim 29
Dependent Claim 17 words
The method of claim 24 wherein said conductive polymer comprises a polyaniline, a polypyrrole or a polyalkylthiophene.
Claim 30
Dependent Claim 52 words
The method of claim 25 wherein said hole is provided in one step or multiple steps wherein a portion of said optional barrier layer is first removed by lithography and RIE or laser ablation and thereafter a portion of said second dielectric layer is removed by lithography and RIE or laser ablation.
Claim 31
Dependent Claim 11 words
The method of claim 27 wherein said conductive polymer is doped.

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2005-08-26 2006-02-25 2006-08-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2009-08-26 2010-02-25 2010-08-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2013-08-26 2014-02-25 2014-08-27 $7700.00 Window Closed / Lapsed

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