← Back to Patent Explorer
US6096566A Expired / Lapsed US ⏱️ 0.0 years remaining

Inter-conductive layer fuse for integrated circuits

Assignee: Clear Logic Inc
•
Filing: 1998-04-22
•
Granted: 2000-08-01
•
Expires: 2018-04-22
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A method and structure for customizing or repairing integrated circuits using passivated tungsten fuses and low-power energy beams to select which tungsten fuses are to be removed. The tungsten fuses are formed in an array to connect possible connection points of the device. A low-power energy source then selects undesired connection points, and a conventional etch removes the selected tungsten fuses, thereby customizing or repairing the integrated circuit. Because neither precision custom masks nor high energy laser sources are required, the problems associated with conventional methods are reduced or eliminated.

Inventors

  • 👤 John MacPherson
  • 👤 Alan H. Huggins

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 20:34
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/49; H10W20/493; H10W20/494; H10W20/01; H10W20/031; H10W20/067

Claims Analysis

Total Claims: 20
Claim 1
Independent Claim 131 words
A method for customizing or repairing an integrated circuit, comprising: forming a patterned conductive layer over a semiconductor substrate, wherein said patterned conductive layer has a plurality of conductive lines with gaps therebetween defining a plurality of possible connection points; depositing an insulating layer on said patterned conductive layer; patterning and etching said insulating layer over said plurality of possible connection points to uncover said plurality of possible connection points; depositing a conductive metal in said plurality of connection points to form fuses electrically connecting said plurality of connection points; forming a passivation layer on the top surface of said fuses; removing said passivation layer from the top surface of at least one of said fuses; and etching said at least one of said fuses to electrically disconnect underlying connection points.
Claim 2
Independent Claim 131 words
A method for customizing or repairing an integrated circuit, comprising: forming a patterned conductive layer over a semiconductor substrate, wherein said patterned conductive layer has a plurality of conductive lines with gaps therebetween defining a plurality of possible connection points; depositing an insulating layer on said patterned conductive layer; patterning and etching said insulating layer over said plurality of possible connection points to uncover said plurality of possible connection points; depositing a conductive metal in said plurality of connection points to form fuses electrically connecting said plurality of connection points; forming a passivation layer on the top surface of said fuses; removing said passivation layer from the top surface of at least one of said fuses; and etching said at least one of said fuses to electrically disconnect underlying connection points.
Claim 3
Dependent Claim 11 words
The method of claim 1, wherein said conductive metal is tungsten.
Claim 4
Dependent Claim 13 words
The method of claim 1, wherein said passivation layer is an oxidized layer.
Claim 5
Dependent Claim 13 words
The method of claim 1, wherein said passivation layer is a nitride layer.
Claim 6
Dependent Claim 36 words
The method of claim 1, further comprising, after said depositing conductive metal: forming a dielectric layer over said fuses and said insulating layer; and removing said dielectric layer over said at least one of said fuses.
Claim 7
Dependent Claim 25 words
The method of claim 5, further comprising depositing and patterning a layer of photoresist over said dielectric layer prior to said removing said dielectric layer.
Claim 8
Dependent Claim 16 words
The method of claim 1, wherein said removing passivation layer is performed with an energy source.
Claim 9
Dependent Claim 21 words
The method of claim 1, wherein said etching etches said passivation layer at a lower etch rate than said conductive metal.
Claim 10
Dependent Claim 17 words
The method of claim 1, further comprising depositing an adhesion metal prior to said conductive metal deposition.
Claim 11
Dependent Claim 35 words
The method of claim 1, wherein vias are also patterned and etched during said patterning and etching said insulating layer, and wherein conductive metal is also deposited in said vias during said conductive metal deposition.
Claim 12
Dependent Claim 37 words
The method of claim 10, further comprising forming a second patterned conductive layer overlying said patterned conductive layer after said conductive metal deposition, wherein said vias connect said patterned conductive layer to said second patterned conductive layer.
Claim 13
Independent Claim 127 words
A method for customizing or repairing an integrated circuit, comprising: forming a patterned conductive layer over a semiconductor substrate, wherein said patterned conductive layer has a plurality of conductive lines with gaps therebetween defining a plurality of possible connection points; depositing an insulating layer on said patterned conductive layer; patterning and etching said insulating layer over said plurality of possible connection points to uncover said plurality of possible connection points; depositing a conductive metal in said plurality of connection points to form fuses electrically connecting said plurality of connection points; depositing a layer of photoresist over said fuses and said insulating layer; removing said photoresist over at least one of said fuses; and etching said at least one of said fuses to electrically disconnect underlying connection points.
Claim 14
Independent Claim 127 words
A method for customizing or repairing an integrated circuit, comprising: forming a patterned conductive layer over a semiconductor substrate, wherein said patterned conductive layer has a plurality of conductive lines with gaps therebetween defining a plurality of possible connection points; depositing an insulating layer on said patterned conductive layer; patterning and etching said insulating layer over said plurality of possible connection points to uncover said plurality of possible connection points; depositing a conductive metal in said plurality of connection points to form fuses electrically connecting said plurality of connection points; depositing a layer of photoresist over said fuses and said insulating layer; removing said photoresist over at least one of said fuses; and etching said at least one of said fuses to electrically disconnect underlying connection points.
Claim 15
Dependent Claim 11 words
The method of claim 12, wherein said conductive metal is tungsten.
Claim 16
Dependent Claim 47 words
The method of claim 12, further comprising forming a dielectric layer over said fuses and said insulating layer prior to said depositing photoresist, and etching said dielectric layer over said at least one of said fuses prior to said etching the at least one of said fuses.
Claim 17
Dependent Claim 24 words
The method of claim 12, further comprising exposing areas of said photoresist over the at least one of said fuses with an energy source.
Claim 18
Dependent Claim 16 words
The method of claim 15, wherein said selecting is performed by irradiation through a non-precision mask.
Claim 19
Dependent Claim 22 words
The method of claim 12, further comprising patterning and etching vias in said insulating layer, and depositing conductive metal in said vias.
Claim 20
Dependent Claim 44 words
The method of claim 17, further comprising forming a second patterned conductive layer overlying said patterned conductive layer after said conductive metal deposition in said connection points and said vias, wherein said vias connect said patterned conductive layer to said second patterned conductive layer.

References Cited (Backward Citations)

US5185291A Cited
US5834321A Cited
US5885749A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2003-08-01 2004-01-31 2004-08-01 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2007-08-01 2008-01-31 2008-08-01 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2011-08-01 2012-01-31 2012-08-01 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag