Patent US6417026B2 successfully refreshed from Google Patents.
US6417026B2
Expired / Lapsed
US
⏱️ 0.0 years remaining
Acoustic wave device face-down mounted on a substrate
Assignee: TDK Corp
•
Filing: 2001-01-05
•
Granted: 2002-07-09
•
Expires: 2021-01-05
Abstract
Abstract In a chip device in which not only an electrode pattern 25 is provided on a main mounting surface 21 a of a base 21 but also bump electrodes 22 are provided as external electrodes for face-down mounting, an electrically insulating layer 31 is provided to be put on at least a part of the main mounting surface 21 a so as to remain edge portions which do not cover at least a part of the electrode pattern 25 , and a protection layer 32 for protecting the main mounting surface is further provided at a distance from the main mounting surface 21 a so as to be put on the electrically insulating layer 31 , so that the bump electrodes 22 are connected to the electrode pattern 25 while being in contact with the edge portions of the electrically insulating layer 31 and the protection layer 32.
Inventors
- 👤 Masashi Gotoh
- 👤 Jitsuo Kanazawa
- 👤 Hajime Kuwajima
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 18:13
CPC Classifications
H; H03; H03H; H03H9/00; H03H9/02; H03H9/05; H03H9/10; H03H9/1064; H03H9/1085; H03H9/058; H03H9/059; H03H9/1092; H10; H10W; H10W74/00; H10W74/10; H10W74/111; H10W74/121; H10W72/00; H10W72/071; H10W72/072; H10W72/07251; H10W72/20
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
126 words
A method for producing a chip device comprising the steps of: forming an electrode pattern and an active region on a main mounting surface of a device substrate; forming at least one electrically insulating layer with on at least a part of said main mounting surface to form a frame body and to expose at least a part of said electrode pattern; forming external electrodes after forming said frame body so that one end of each of said external electrodes is connected to said electrode pattern while said external electrodes are in contact with said edge portions of said electrically insulating layer; and said insulating layer is interposed between said main mounting surface and a mount-side base substrate while not extending completely under said active region.
Claim 2
Independent Claim
126 words
A method for producing a chip device comprising the steps of: forming an electrode pattern and an active region on a main mounting surface of a device substrate; forming at least one electrically insulating layer with on at least a part of said main mounting surface to form a frame body and to expose at least a part of said electrode pattern; forming external electrodes after forming said frame body so that one end of each of said external electrodes is connected to said electrode pattern while said external electrodes are in contact with said edge portions of said electrically insulating layer; and said insulating layer is interposed between said main mounting surface and a mount-side base substrate while not extending completely under said active region.
Claim 3
Dependent Claim
87 words
A method for producing a chip device according to claim 1 , wherein said method further comprises a face-down mounting step of bonding said external electrodes to a mount-side substrate to thereby perform face-down mounting after the external electrode formation step, so that not only said external electrodes are connected to a conductor pattern of said mount-side substrate but also said electrically insulating layer is brought into close contact with both said main mounting surface and the surface of said mount-side substrate in said face-down mounting step.
Claim 4
Dependent Claim
33 words
A method for producing a chip according to claim 1 , wherein said electrical insulating layer is formed on the main mounting surface before the electrode pattern is connected to the external electrode.
Claim 5
Independent Claim
128 words
A method for producing a chip device comprising the steps of: forming an electrode pattern and an active region on a main mounting surface of a device sustrate; forming at least one electrically insulating layer on at least a part of said main mounting surface to form a frame body and to expose at least a part of said electrode pattern; forming external electrodes after forming said at least one electrically insulating layer so that one end of each of said external electrodes is connected to said electrode pattern while said external electrodes are in contact with said edge portions of said electrically insulating layer, said insulating layer is interposed between said main mounting surface and a mount-side base substrate while not extending completely under said active region.
Claim 6
Independent Claim
128 words
A method for producing a chip device comprising the steps of: forming an electrode pattern and an active region on a main mounting surface of a device sustrate; forming at least one electrically insulating layer on at least a part of said main mounting surface to form a frame body and to expose at least a part of said electrode pattern; forming external electrodes after forming said at least one electrically insulating layer so that one end of each of said external electrodes is connected to said electrode pattern while said external electrodes are in contact with said edge portions of said electrically insulating layer, said insulating layer is interposed between said main mounting surface and a mount-side base substrate while not extending completely under said active region.
Claim 7
Dependent Claim
87 words
A method for producing a chip device according to claim 4 , wherein said method further comprises a face-down mounting step of bonding said external electrodes to said mount-side substrate to thereby perform face-down mounting after the external electrode formation step, so that not only said external electrodes are connected to a conductor pattern of said mount-side substrate but also said electrically insulating layer is brought into close contact with both said main mounting surface and the surface of said mount-side substrate in said face-down mounting step.
Claim 8
Dependent Claim
34 words
A method for producing a chip device according to claim 4 , wherein said electrical insulating layer is formed on the main mounting surface before the electrode pattern is connected to the external electrode.
References Cited (Backward Citations)
US3885173A
Cited
JPH0555303A
Cited
JPH05291864A
Cited
JPH0799420A
Cited
US5459368A
Cited
US5699027A
Cited
EP0740343A2
Cited
US5757078A
Cited
JPH08307197A
Cited
US5821665A
Cited
US5991989A
Cited
US6262513B1
Cited
JPH09246905A
Cited
JPH1174755A
Cited
US6181015B1
Cited
US5969461A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2005-07-08 | 2006-01-07 | 2006-07-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2009-07-08 | 2010-01-07 | 2010-07-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2013-07-08 | 2014-01-07 | 2014-07-09 | $7700.00 | Window Closed / Lapsed |