Patent US6407450B1 successfully refreshed from Google Patents.
US6407450B1
Expired / Lapsed
US
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Semiconductor package with universal substrate for electrically interfacing with different sized chips that have different logic functions
Assignee: Altera Corp
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Filing: 2000-07-13
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Granted: 2002-06-18
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Expires: 2020-07-13
Abstract
Abstract A semiconductor package including a universal substrate with interior pads, peripheral pads, and substrate traces positioned between the interior pads and the peripheral pads. The interior pads are configured for electrical interface with a first semiconductor chip. The peripheral pads are configured for electrical interface with a second semiconductor chip that is larger than the first semiconductor chip. By providing a universal substrate that can accommodate multiple die sizes, package design time and costs can thus be reduced.
Inventors
- 👤 Tarun Verma
- 👤 Larry Anderson
- 👤 Jon Long
- 👤 Bruce Pedersen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 14:05
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/60; H10W70/62; H10W70/65; H10W70/654; H10W70/656; H10W72/00; H10W72/071; H10W72/073; H10W72/07351; H10W72/07353; H10W72/075; H10W72/20; H10W72/251; H10W72/29; H10W72/30; H10W72/331; H10W72/334; H10W72/50; H10W72/851; H10W72/874; H10W72/884; H10W72/90; H10W72/931; H10W72/951; H10W90/00; H10W90/701; H10W90/721; H10W90/724; H10W90/731; H10W90/734; H10W90/751; H10W90/754
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
75 words
A semiconductor package, comprising: a universal substrate including interior pads, peripheral pads, and substrate traces positioned between said interior pads and said peripheral pads, said interior pads being configured for electrical interface with a first semiconductor chip having a first logic function and said peripheral pads being configured for electrical interface with a second semiconductor chip that is larger than said first semiconductor chip and having a logic function different from the first logic function.
Claim 2
Dependent Claim
75 words
A semiconductor package, comprising: a universal substrate including interior pads, peripheral pads, and substrate traces positioned between said interior pads and said peripheral pads, said interior pads being configured for electrical interface with a first semiconductor chip having a first logic function and said peripheral pads being configured for electrical interface with a second semiconductor chip that is larger than said first semiconductor chip and having a logic function different from the first logic function.
Claim 3
Dependent Claim
40 words
The semiconductor package of claim 1 , wherein said universal substrate comprises a center portion and a peripheral portion, wherein said interior pads are located on said center portion, and wherein said peripheral pads are located on said peripheral portion.
Claim 4
Dependent Claim
23 words
The semiconductor package of claim 1 , wherein said universal substrate comprises substrate traces that couple said interior pads to said peripheral pads.
Claim 5
Dependent Claim
24 words
The semiconductor package of claim 3 , further comprising: package pins; and internal package traces that couple said interior pads to said package pins.
Claim 6
Dependent Claim
23 words
The semiconductor package of claim 1 , wherein said interior pads are configured for coupling to flip-chip pads of said first semiconductor chip.
Claim 7
Dependent Claim
26 words
The semiconductor package of claim 1 , wherein said interior pads are configured for attaching to flip-chip pads of said first semiconductor chip by bond balls.
Claim 8
Dependent Claim
23 words
The semiconductor package of claim 1 , wherein said peripheral pads are configured for coupling to flip-chip pads of said second semiconductor chip.
Claim 9
Dependent Claim
26 words
The semiconductor package of claim 1 , wherein said peripheral pads are configured for attaching to flip-chip pads of said second semiconductor chip by bond balls.
Claim 10
Dependent Claim
23 words
The semiconductor package of claim 1 , wherein said peripheral pads are configured for coupling to bond pads of said second semiconductor chip.
Claim 11
Dependent Claim
26 words
The semiconductor package of claim 1 , wherein said peripheral pads are configured for attaching to bond pads of said second semiconductor chip by bond wires.
Claim 12
Dependent Claim
32 words
The semiconductor package of claim 1 further including package pins connected to the interior pads and having dedicated signal assignments regardless of the logic function of a chip mounted to the substrate.
Claim 13
Dependent Claim
53 words
A semiconductor package, comprising: a universal substrate configured for electrical interface with one of a plurality of semiconductor chips including a first semiconductor chip having a first programmable logic function and a second semiconductor chip having a second programmable logic function, wherein said second semiconductor chip is larger than said first semiconductor chip.
Claim 14
Dependent Claim
53 words
A semiconductor package, comprising: a universal substrate configured for electrical interface with one of a plurality of semiconductor chips including a first semiconductor chip having a first programmable logic function and a second semiconductor chip having a second programmable logic function, wherein said second semiconductor chip is larger than said first semiconductor chip.
Claim 15
Dependent Claim
70 words
The semiconductor package of claim 12 , wherein said universal substrate comprises: interior pads positioned on a center portion of said universal substrate, said interior pads being configured for coupling to said first semiconductor chip; peripheral pads positioned on a peripheral portion of said universal substrate, said peripheral pads being configured for coupling to said second semiconductor chip; and substrate traces for coupling said interior pads to said peripheral pads.
Claim 16
Dependent Claim
24 words
The semiconductor package of claim 13 , further comprising: package pins; and internal package traces that couple said package pins to said interior pads.
Claim 17
Dependent Claim
23 words
The semiconductor package of claim 13 , wherein said interior pads are configured for coupling to flip-chip pads of said first semiconductor chip.
Claim 18
Dependent Claim
26 words
The semiconductor package of claim 13 , wherein said interior pads are configured for attaching to flip-chip pads of said first semiconductor chip by bond balls.
Claim 19
Dependent Claim
23 words
The semiconductor package of claim 13 , wherein said peripheral pads are configured for coupling to flip-chip pads of said second semiconductor chip.
Claim 20
Dependent Claim
26 words
The semiconductor package of claim 13 , wherein said peripheral pads are configured for attaching to flip-chip pads of said second semiconductor chip by bond balls.
Claim 21
Dependent Claim
23 words
The semiconductor package of claim 13 , wherein said peripheral pads are configured for coupling to bond pads of said second semiconductor chip.
Claim 22
Dependent Claim
26 words
The semiconductor package of claim 13 , wherein said peripheral pads are configured for attaching to bond pads of said second semiconductor chip by bond wires.
Claim 23
Dependent Claim
15 words
The semiconductor package of claim 12 further including a semiconductor mounted to the universal substrate.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2005-06-17 | 2005-12-17 | 2006-06-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2009-06-17 | 2009-12-17 | 2010-06-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2013-06-17 | 2013-12-17 | 2014-06-18 | $7700.00 | Window Closed / Lapsed |