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Semiconductor memory device having function of supplying stable power supply voltage
Assignee: Renesas Electronics Corp
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Filing: 2001-01-19
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Granted: 2002-01-08
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Expires: 2021-01-19
Abstract
Abstract The inventive semiconductor memory device comprises a synchronous circuit formed by a PLL circuit requiring precise operations, an internal circuit group and a VDC circuit. The VDC circuit, a capacitor, a PMOS transistor for a dummy current and an NMOS transistor serving as a high impedance element are arranged for the synchronous circuit. The VDC circuit is arranged for the internal circuit group. The VDC circuit eliminates power supply noise. The PMOS transistor stabilizes the operation of a differential amplifier of the VDC circuit. The capacitor keeps potential difference between a power supply side and a GND side constant. The NMOS transistor stabilizes the voltage on the GND side.
Inventors
- 👤 Tsukasa Ooishi
- 👤 Jun Setogawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 19:57
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/401; G11C11/4063; G11C11/407; G11C11/4074; G11C5/00; G11C5/14; G11C5/143; G11C5/147
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
83 words
A semiconductor memory device comprising: a pin; an internal circuit, including a memory cell array, operating on the basis of an input from said pin; and a leakage current prevention circuit provided between said pin and said internal circuit for detecting a leakage current from said internal circuit by detecting whether a current consumed in said internal circuit exceeds a prescribed current based on a potential change at a predetermined node and electrically disconnecting said pin and said internal circuit from each other.
Claim 2
Dependent Claim
83 words
A semiconductor memory device comprising: a pin; an internal circuit, including a memory cell array, operating on the basis of an input from said pin; and a leakage current prevention circuit provided between said pin and said internal circuit for detecting a leakage current from said internal circuit by detecting whether a current consumed in said internal circuit exceeds a prescribed current based on a potential change at a predetermined node and electrically disconnecting said pin and said internal circuit from each other.
Claim 3
Dependent Claim
46 words
The semiconductor memory device in accordance with claim 1 , wherein, said predetermined node is a power source node, and said leakage current prevention circuit includes a circuit electrically disconnecting said pin and said internal circuit from each other based on a result of said detection.
Claim 4
Dependent Claim
60 words
The semiconductor memory device in accordance with claim 2 , wherein said circuit includes: a voltage supply circuit supplying the operating voltage to said internal circuit on the basis of a voltage supplied from said pin, and said voltage supply circuit stops supply of the operating voltage to said internal circuit in response to the output of said detection circuit.
Claim 5
Dependent Claim
113 words
A semiconductor device comprising: a pin; an internal circuit, operating on the basis of an input from said pin; and a leakage current prevention circuit provided between said pin and said internal circuit for detecting a leakage current from said internal circuit by detecting whether a current consumed in said internal circuit exceeds a prescribed current based on a potential change at a predetermined node and electrically disconnecting said pin and said internal circuit from each other, wherein said predetermined node is a power source node and said leakage current prevention circuit includes a circuit electrically disconnecting said pin and said internal circuit from each other based on a result of said detection.
Claim 6
Dependent Claim
113 words
A semiconductor device comprising: a pin; an internal circuit, operating on the basis of an input from said pin; and a leakage current prevention circuit provided between said pin and said internal circuit for detecting a leakage current from said internal circuit by detecting whether a current consumed in said internal circuit exceeds a prescribed current based on a potential change at a predetermined node and electrically disconnecting said pin and said internal circuit from each other, wherein said predetermined node is a power source node and said leakage current prevention circuit includes a circuit electrically disconnecting said pin and said internal circuit from each other based on a result of said detection.
Claim 7
Dependent Claim
58 words
The semiconductor device in accordance with claim 4 , wherein said circuit includes: a voltage supply circuit supplying operating voltage to said internal circuit on the basis of a voltage supplied from said pin, and said voltage supply circuit stops supply of the operating voltage to said internal circuit in response to the output of said detection circuit.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2005-01-07 | 2005-07-09 | 2006-01-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2009-01-07 | 2009-07-09 | 2010-01-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2013-01-07 | 2013-07-09 | 2014-01-08 | $7700.00 | Window Closed / Lapsed |