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US6329705B1 Expired / Lapsed US ⏱️ 0.0 years remaining

Leadframes including offsets extending from a major plane thereof, packaged semiconductor devices including same, and method of designing and fabricating such leadframes

Assignee: Micron Technology Inc
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Filing: 1998-05-20
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Granted: 2001-12-11
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Expires: 2018-05-20
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Abstract

Abstract A leadframe including offsets extending from a major plane thereof. The offsets extend from the major plane at a non-perpendicular angle thereto. Preferably, the angle of extension, relative to the major plane, is about 45 degrees or less. The offsets may extend upwardly and/or downwardly from the major plane. The offsets of the present invention are useful for preventing warpage, bowing, skewing, or other distortions of a packaged semiconductor device including same when subjected to high Temperatures or changes in temperature.

Inventors

  • 👤 Syed Sajid Ahmad

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 12:12
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/40; H10W70/421; H10W70/424; H10W76/00; H10W76/40; H10W72/00; H10W72/071; H10W72/075; H10W72/90; H10W72/951; H10W74/00; H10W90/00; H10W90/701; H10W90/751; H10W90/756

Claims Analysis

Total Claims: 19
Claim 1
Independent Claim 112 words
A semiconductor device leadframe, comprising: a die mounting region; a plurality of leads extending from a location proximate said die mounting region, each lead of said plurality including a die connect end that is electrically connectable to a bond pad of a semiconductor device; and at least one offset not comprising a lead, said at least one offset extending from said die mounting region, said at least one offset being configured for at least controlling deflection of portions of said leadframe from forces acting thereon and locating portions of said leadframe during processes, said at least one offset extending from the leadframe in a direction non-perpendicular to a plane of the leadframe.
Claim 2
Dependent Claim 112 words
A semiconductor device leadframe, comprising: a die mounting region; a plurality of leads extending from a location proximate said die mounting region, each lead of said plurality including a die connect end that is electrically connectable to a bond pad of a semiconductor device; and at least one offset not comprising a lead, said at least one offset extending from said die mounting region, said at least one offset being configured for at least controlling deflection of portions of said leadframe from forces acting thereon and locating portions of said leadframe during processes, said at least one offset extending from the leadframe in a direction non-perpendicular to a plane of the leadframe.
Claim 3
Dependent Claim 26 words
The leadframe of claim 1 , wherein said at least one offset extends from said plane at an angle of about 45 degrees or less thereto.
Claim 4
Dependent Claim 18 words
The leadframe of claim 1 , wherein said at least one offset extends from said die mounting region.
Claim 5
Dependent Claim 11 words
The leadframe of claim 1 , further comprising a bus bar.
Claim 6
Dependent Claim 19 words
The leadframe of claim 4 , wherein said at least one offset comprises a portion of said bus bar.
Claim 7
Dependent Claim 23 words
The leadfram of claim 1 , wherein said at least one offset is disposed adjacent at least one of said plurality of leads.
Claim 8
Dependent Claim 41 words
The leadframe of claim 1 , wherein said at least one offset includes a plurality of offsets extending in a direction non-perpendicular to said plane, a first group of said plurality of offsets extending from a first side of said plane.
Claim 9
Dependent Claim 23 words
The leadframe of claim 7 , wherein a second group of said plurality of offsets extends from a second side of said plane.
Claim 10
Dependent Claim 98 words
A package semiconductor device, comprising: a leadframe including a plurality of offsets extending therefrom non-perpendicularly with respect to a major plane thereof, none of said plurality of offsets comprising a lead, at least one of said plurality of offsets being configured for at least controlling deflection of portions of said leadframe from forces acting thereon and locating portions of said leadframe of said leadframe during processes, and a plurality of leads, each lead of said plurality having a die connect end; and a die adjacent at least some of said die connect ends of said plurality of leads.
Claim 11
Dependent Claim 98 words
A package semiconductor device, comprising: a leadframe including a plurality of offsets extending therefrom non-perpendicularly with respect to a major plane thereof, none of said plurality of offsets comprising a lead, at least one of said plurality of offsets being configured for at least controlling deflection of portions of said leadframe from forces acting thereon and locating portions of said leadframe of said leadframe during processes, and a plurality of leads, each lead of said plurality having a die connect end; and a die adjacent at least some of said die connect ends of said plurality of leads.
Claim 12
Dependent Claim 29 words
The packaged semiconductor device of claim 8 , wherein selected ones of said plurality of leads are electrically connected to a corresponding plurality of bond pads on said die.
Claim 13
Dependent Claim 33 words
The packaged semiconductor device of claim 8 , wherein each of said plurality of offsets extends from said leadframe at an angle of about 45 degrees or less relative to said major plane.
Claim 14
Dependent Claim 25 words
The packaged semiconductor device of claim 9 , further comprising a package encasing at least a portion of said die and said plurality of leads.
Claim 15
Dependent Claim 28 words
The package semiconductor device of claim 12 , wherein at least one of said plurality of offsets extends to a location proximate an exterior surface of said package.
Claim 16
Dependent Claim 29 words
The package semiconductor device of claim 13 , wherein said at least one of said plurality of offsets extends to a location that is flush with said exterior surface.
Claim 17
Dependent Claim 29 words
The package semiconductor device of claim 12 , wherein an edge of at least one of said plurality of offsets is exposed through an exterior surface of said package.
Claim 18
Dependent Claim 26 words
The package semiconductor device of claim 9 , wherein a first group of said plurality of offsets extends from a first side of said major plane.
Claim 19
Dependent Claim 26 words
The package semiconductor device of claim 9 , wherein a second group of said plurality of offsets extends from a second side of said major plane.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2004-12-10 2005-06-11 2005-12-11 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2008-12-10 2009-06-11 2009-12-11 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2012-12-10 2013-06-11 2013-12-11 $7700.00 Window Closed / Lapsed

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