Stacked printed circuit board memory module

Claim 2

A stacked memory module, comprising: a primary circuit board having a first and second surface adapted for mounting electronic components; wherein at least the first surface of the primary board has at least one primary connector and at least one electronic component; a daughter board having a first and second surface adapted for mounting electronic components; wherein at least the first surface of the daughter board has at least one electronic component and at least one daughter connector; the primary connectors being adapted for removeably receiving and electrically coupling the daughter connectors such that the first surface of the primary board and the first surface of the daughter board face each other wherein the primary and daughter connectors and the electronic components on said first side of the primary and daughter boards are configured so as to define at least one channel that is free of said connectors and components and which extends between at least two edges of said primary and daughter boards so as to conduct heat from said electronic components away from said primary and daughter boards via said at least one channel; a control connector adapted to engage with a connecting port on a supporting structure; the control connector being provided at an end of the primary board; and wherein the primary circuit board and the daughter circuit board are interconnected in a spaced and substantially parallel relation.

Claim 3

A stacked memory module, comprising: a primary circuit board having a first and second surface adapted for mounting electronic components; wherein at least the first surface of the primary board has a plurality of primary connectors and at least one electronic component; a daughter circuit board having a first and second surface adapted for mounting electronic components; wherein at least the first surface of the daughter circuit board has at least one electronic component and a plurality of daughter connectors; the primary circuit connectors being adapted for removeably receiving and electrically coupling the daughter connectors such that the first surface of the primary board and the first surface of the daughter board face each other wherein the primary and daughter connectors and the electronic components on said first side of the primary and daughter boards are configured so as to define at least one channel that is free of said connectors and components and which extends between at least two edges of said primary and daughter boards so as to conduct heat from said electronic components away from said primary and daughter boards via said at least one channel; a control connector adapted to engage with a connecting port at an end of the primary circuit board; and wherein the primary circuit board and the daughter circuit board are interconnected in a spaced and substantially parallel relation.

Claim 4

A stacked memory module, comprising: a primary circuit board having a first and second surface adapted for mounting electronic components; wherein at least the first surface of the primary board has a plurality of primary connectors and at least one electronic component; a daughter circuit board having a first and second surface adapted for mounting electronic components; wherein at least the first surface of the daughter circuit board has at least one electronic component and a plurality of daughter connectors; the primary circuit connectors being adapted for removeably receiving and electrically coupling the daughter connectors such that the first surface of the primary board and the first surface of the daughter board face each other wherein the primary and daughter connectors and the electronic components on said first side of the primary and daughter boards are configured so as to define at least one channel that is free of said connectors and components and which extends between at least two edges of said primary and daughter boards so as to conduct heat from said electronic components away from said primary and daughter boards via said at least one channel; a control connector adapted to engage with a connecting port at an end of the primary circuit board; and wherein the primary circuit board and the daughter circuit board are interconnected in a spaced and substantially parallel relation.

Claim 5

The module of claim 2 wherein the at least one primary connector is oriented perpendicular to the first and second surface of the primary circuit board.

Claim 6

The module of claim 2 wherein the at least one daughter connector is oriented perpendicular to the first and second surface of the daughter circuit board.

Claim 7

The module of claim 2 wherein the primary and daughter connectors align with each other and are perpendicular to the first and second surface of the primary and the daughter board, whereby a conductive path is minimized between each of the primary and daughter circuit boards.

Claim 8

The module of claim 5 wherein the plurality of primary and daughter circuit connectors are spaced such that said channel is created for airflow between the plurality of primary and daughter connectors.

Claim 9

The module of claim 2 wherein the at least one primary connector is located between the electronic components and the control connector.

Claim 10

The module of claim 2 further comprising a plurality of via connections on the primary board and the daughter boards for electrically coupling the electronic components on the first and second surfaces.

Claim 11

The module of claim 2 wherein the electronic components are memory integrated circuits.

Claim 12

The module of claim 2 further comprising a memory driver mounted on at least one of the primary circuit board and the daughter circuit boards.

Claim 13

A stacked memory module, comprising: a primary circuit board having a first and second surface adapted for mounting electronic components; wherein at least the first surface of the primary circuit board has at least one primary connector and at least one electronic component; a daughter circuit board having a first and second surface adapted for mounting electronic components; wherein at least one surface of each of the daughter circuit boards has at least one electronic component and at least one daughter connector; the primary connectors being adapted for removeably receiving and electrically coupling at least one of the daughter connectors such that the first surface of the primary board and the first surface of the daughter board face each other wherein the primary and daughter connectors and the electronic components on said first side of the primary and daughter boards are configured so as to define at least one channel that is free of said connectors and components and which extends between at least two edges of said primary and daughter boards so as to conduct heat from said electronic components away from said primary and daughter boards via said at least one channel; each of the daughter connectors being adapted for removeably interconnecting and electrically coupling at least one of the remaining daughter connectors on at least one of the remaining daughter circuit boards; a control connector adapted to engage with a connecting port on a supporting structure; the control connector being provided at an end of at least one of the primary circuit board and the daughter circuit boards; and wherein the primary circuit board and each of the daughter circuit boards are connected in a spaced and substantially parallel relation.

Claim 14

A stacked memory module, comprising: a primary circuit board having a first and second surface adapted for mounting electronic components; wherein at least the first surface of the primary circuit board has at least one primary connector and at least one electronic component; a daughter circuit board having a first and second surface adapted for mounting electronic components; wherein at least one surface of each of the daughter circuit boards has at least one electronic component and at least one daughter connector; the primary connectors being adapted for removeably receiving and electrically coupling at least one of the daughter connectors such that the first surface of the primary board and the first surface of the daughter board face each other wherein the primary and daughter connectors and the electronic components on said first side of the primary and daughter boards are configured so as to define at least one channel that is free of said connectors and components and which extends between at least two edges of said primary and daughter boards so as to conduct heat from said electronic components away from said primary and daughter boards via said at least one channel; each of the daughter connectors being adapted for removeably interconnecting and electrically coupling at least one of the remaining daughter connectors on at least one of the remaining daughter circuit boards; a control connector adapted to engage with a connecting port on a supporting structure; the control connector being provided at an end of at least one of the primary circuit board and the daughter circuit boards; and wherein the primary circuit board and each of the daughter circuit boards are connected in a spaced and substantially parallel relation.

Claim 15

A stacked memory module, comprising: a primary circuit board having a first and second surface for mounting electronic components; wherein at least the first surface of the primary circuit board has a plurality of primary connectors and at least one electronic component; a daughter board having a first and second surface adapted for mounting electronic components; wherein at least the first surface of the daughter circuit board has at least one electronic component and a plurality of daughter connectors; the primary connectors being adapted for removeably receiving and electrically coupling at least one of the daughter connectors such that the first surface of the primary board and the first surface of the daughter board face each other wherein the primary and daughter connectors and the electronic components on said first side of the primary and daughter boards are configured so as to define at least one channel that is free of said connectors and components and which extends between at least two edges of said primary and daughter boards so as to conduct heat from said electronic components away from said primary and daughter boards via said at least one channel; each of the daughter connectors being adapted for removeably receiving and electrically coupling at least one of the remaining daughter connectors on at least one of the remaining daughter circuit boards; a control connector adapted to engage with a connecting port on a supporting structure; the control connector being provided at an end of at least one of the primary circuit board and the daughter circuit boards; and wherein the primary circuit board and each of the daughter circuit boards are connected in a spaced and substantially parallel relation.

Claim 16

A stacked memory module, comprising: a primary circuit board having a first and second surface for mounting electronic components; wherein at least the first surface of the primary circuit board has a plurality of primary connectors and at least one electronic component; a daughter board having a first and second surface adapted for mounting electronic components; wherein at least the first surface of the daughter circuit board has at least one electronic component and a plurality of daughter connectors; the primary connectors being adapted for removeably receiving and electrically coupling at least one of the daughter connectors such that the first surface of the primary board and the first surface of the daughter board face each other wherein the primary and daughter connectors and the electronic components on said first side of the primary and daughter boards are configured so as to define at least one channel that is free of said connectors and components and which extends between at least two edges of said primary and daughter boards so as to conduct heat from said electronic components away from said primary and daughter boards via said at least one channel; each of the daughter connectors being adapted for removeably receiving and electrically coupling at least one of the remaining daughter connectors on at least one of the remaining daughter circuit boards; a control connector adapted to engage with a connecting port on a supporting structure; the control connector being provided at an end of at least one of the primary circuit board and the daughter circuit boards; and wherein the primary circuit board and each of the daughter circuit boards are connected in a spaced and substantially parallel relation.

Claim 17

The module of claim 12 wherein each of the plurality of primary connectors is oriented perpendicular to the first surface and second surface of the primary circuit board.

Claim 18

The module of claim 12 wherein each of the plurality of daughter connectors is oriented perpendicular to the first surface and second surface of each of the daughter boards.

Claim 19

The module of claim 12 wherein each of the primary and daughter connectors align with each other and are perpendicular to the first and second surface of the primary and daughter circuit boards, whereby a conductive path is minimized between each of the primary and daughter circuit boards.

Claim 20

The module of claim 15 wherein the plurality of primary and daughter circuit connectors are spaced such that said channel is created for airflow between the plurality of primary and daughter connectors.

Claim 21

The module of claim 12 wherein each of the plurality of primary connectors is located between the electronic components and the control connector.

Claim 22

The module of claim 12 further comprising a plurality of via connections on the primary board and the daughter boards for electrically coupling the electronic components on the first and second surfaces.

Claim 23

The module of claim 12 wherein the electronic components are memory integrated circuits.

Claim 24

The module of claim 12 further comprising a memory driver mounted on at least one of the primary circuit board and the daughter boards.

Claim 25

A stacked memory module as defined in claim 1 wherein the primary and daughter connectors and the electronic components on the primary and daughter boards are configured such that the at least one channel defined thereby extends between said primary and daughter boards from a first edge of each of the primary and daughter boards and between at least two adjacent connectors on the primary and daughter boards and adjacent said electronic components on said primary and daughter boards to at least a second edge of each of the primary and daughter boards.

Claim 26

A stacked memory module as defined in claim 2 wherein the primary and daughter connectors and the electronic components on the primary and daughter boards are configured such that the at least one channel defined thereby extends between said primary and daughter boards from a first edge of each of the primary and daughter boards and between at least two adjacent connectors on the primary and daughter boards and adjacent said electronic components on said primary and daughter boards to at least a second edge of each of the primary and daughter boards.

Claim 27

A stacked memory module as defined in claim 11 wherein the primary and daughter connectors and the electronic components on the primary and daughter boards are configured such that the at least one channel defined thereby extends between said primary and daughter boards from a first edge of each of the primary and daughter boards and between at least two adjacent connectors on the primary and daughter boards and adjacent said electronic components on said primary and daughter boards to at least a second edge of each of the primary and daughter boards.

Claim 28

A stacked memory module as defined in claim 12 wherein the primary and daughter connectors and the electronic components on the primary and daughter boards are configured such that the at least one channel defined thereby extends between said primary and daughter boards from a first edge of each of the primary and daughter boards and between at least two adjacent connectors on the primary and daughter boards and adjacent said electronic components on said primary and daughter boards to at least a second edge of each of the primary and daughter boards.