US6283131B1
Expired / Lapsed
US
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In-situ strip process for polysilicon etching in deep sub-micron technology
Assignee: Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Filing: 2000-09-25
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Granted: 2001-09-04
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Expires: 2020-09-25
Abstract
Abstract A new method of patterning the polysilicon layer in the manufacture of an integrated circuit device has been achieved. A polysilicon layer is provided overlying a semiconductor substrate. The polysilicon layer may overlie a gate oxide layer and thereby comprise the polysilicon gate for MOS devices. A hard mask layer is provided overlying the polysilicon layer. A resist layer is provided overlying the hard mask layer. The resist layer is patterned to form a resist mask the exposes a part of the hard mask layer. The polysilicon layer is patterned in a plasma dry etching chamber. First, the resist layer is optionally trimmed by etching. Second, the hard mask layer is etched where exposed by the resist mask to form a hard mask that exposes a part of the polysilicon layer. Third, the resist mask is stripped away. Fourth, polymer residue from the resist mask is cleaned away using a chemistry containing CF4 gas. Fifth, the polysilicon layer is etched where exposed by the hard mask. After the polysilicon layer is so patterned in the dry plasma etch chamber, the hard mask layer is stripped away to complete the patterning of the polysilicon layer in the manufacture of the integrated circuit device.
Inventors
- 👤 Horng-Wen Chen
- 👤 Chi-How Wu
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 08:26
CPC Classifications
H; H10; H10P; H10P50/00; H10P50/71; H10P50/20; H10P50/28; H10P50/286; H10P50/287
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
163 words
A method to pattern a polysilicon layer in the manufacture of an integrated circuit device comprising: providing a polysilicon layer overlying a semiconductor substrate; providing a hard mask layer overlying said polysilicon layer; providing a resist layer overlying said hard mask layer; patterning said resist layer to form a resist mask that exposes a part of said hard mask layer; patterning said polysilicon layer wherein said patterning is performed sequentially in a dry plasma etch chamber and wherein said patterning comprises: etching said hard mask layer exposed by said resist mask to form a hard mask that exposes a part of said polysilicon layer; thereafter stripping away said resist mask; thereafter cleaning away polymer residue from said hard mask wherein said cleaning away comprises a chemistry containing CF 4 gas; and thereafter etching said polysilicon layer exposed by said hard mask; and stripping away said hard mask to complete the patterning of said polysilicon layer in the manufacture of the integrated circuit device.
Claim 2
Independent Claim
163 words
A method to pattern a polysilicon layer in the manufacture of an integrated circuit device comprising: providing a polysilicon layer overlying a semiconductor substrate; providing a hard mask layer overlying said polysilicon layer; providing a resist layer overlying said hard mask layer; patterning said resist layer to form a resist mask that exposes a part of said hard mask layer; patterning said polysilicon layer wherein said patterning is performed sequentially in a dry plasma etch chamber and wherein said patterning comprises: etching said hard mask layer exposed by said resist mask to form a hard mask that exposes a part of said polysilicon layer; thereafter stripping away said resist mask; thereafter cleaning away polymer residue from said hard mask wherein said cleaning away comprises a chemistry containing CF 4 gas; and thereafter etching said polysilicon layer exposed by said hard mask; and stripping away said hard mask to complete the patterning of said polysilicon layer in the manufacture of the integrated circuit device.
Claim 3
Dependent Claim
14 words
The method according to claim 1 wherein said hard mask layer comprises silicon oxynitride.
Claim 4
Dependent Claim
22 words
The method according to claim 1 wherein said step of etching said hard mask layer comprises a chemistry containing CF 4 gas.
Claim 5
Dependent Claim
22 words
The method according to claim 1 wherein said step of stripping away said resist mask comprises a chemistry containing O 2 gas.
Claim 6
Dependent Claim
24 words
The method according to claim 1 wherein said step of etching said polysilicon layer comprises a main etch step followed by an overetch step.
Claim 7
Dependent Claim
29 words
The method according to claim 1 wherein said step of etching said polysilicon layer comprises a chemistry of: HBr gas, Cl 2 gas, He—O 2 gas, and combinations thereof.
Claim 8
Dependent Claim
23 words
The method according to claim 1 further comprising providing a silicon dioxide layer overlying said hard mask layer and underlying said resist layer.
Claim 9
Dependent Claim
42 words
The method according to claim 1 further comprising etching said resist layer to trim said resist layer prior to said step of etching said hard mask layer wherein said etching of said resist layer is performed in said dry plasma etching chamber.
Claim 10
Independent Claim
183 words
A method to pattern a polysilicon layer in the manufacture of an integrated circuit device comprising: providing a polysilicon layer overlying a semiconductor substrate; providing a hard mask layer overlying said polysilicon layer; providing a silicon dioxide layer overlying said hard mask layer; providing a resist layer overlying said hard mask layer; patterning said resist layer to form a resist mask that exposes a part of said hard mask layer; patterning said polysilicon layer wherein said patterning is performed sequentially in a dry plasma etch chamber and wherein said patterning comprises: etching said resist mask to trim said resist mask; thereafter etching said hard mask layer exposed by said resist mask to form a hard mask that exposes a part of said polysilicon layer; thereafter stripping away said resist mask; thereafter cleaning away polymer residue from said resist mask wherein said cleaning away comprises a chemistry containing CF 4 gas; and thereafter etching said polysilicon layer exposed by said hard mask; and stripping away said hard mask to complete the patterning of said polysilicon layer in the manufacture of the integrated circuit device.
Claim 11
Independent Claim
183 words
A method to pattern a polysilicon layer in the manufacture of an integrated circuit device comprising: providing a polysilicon layer overlying a semiconductor substrate; providing a hard mask layer overlying said polysilicon layer; providing a silicon dioxide layer overlying said hard mask layer; providing a resist layer overlying said hard mask layer; patterning said resist layer to form a resist mask that exposes a part of said hard mask layer; patterning said polysilicon layer wherein said patterning is performed sequentially in a dry plasma etch chamber and wherein said patterning comprises: etching said resist mask to trim said resist mask; thereafter etching said hard mask layer exposed by said resist mask to form a hard mask that exposes a part of said polysilicon layer; thereafter stripping away said resist mask; thereafter cleaning away polymer residue from said resist mask wherein said cleaning away comprises a chemistry containing CF 4 gas; and thereafter etching said polysilicon layer exposed by said hard mask; and stripping away said hard mask to complete the patterning of said polysilicon layer in the manufacture of the integrated circuit device.
Claim 12
Dependent Claim
14 words
The method according to claim 9 wherein said hard mask layer comprises silicon oxynitride.
Claim 13
Dependent Claim
26 words
The method according to claim 9 wherein said step of etching said resist mask to trim said resist mask comprises a chemistry containing O 2 gas.
Claim 14
Dependent Claim
22 words
The method according to claim 9 wherein said step of etching said hard mask layer comprises a chemistry of CF 4 gas.
Claim 15
Dependent Claim
22 words
The method according to claim 9 wherein said step of stripping away said resist layer comprises a chemistry containing O 2 gas.
Claim 16
Dependent Claim
24 words
The method according to claim 9 wherein said step of etching said polysilicon layer comprises a main etch step followed by an overetch step.
Claim 17
Dependent Claim
29 words
The method according to claim 9 wherein said step of etching said polysilicon layer comprises a chemistry of: HBr gas, Cl 2 gas, He—O 2 gas, and combinations thereof.
Claim 18
Independent Claim
211 words
A method to pattern a polysilicon layer in the manufacture of an integrated circuit device comprising: providing a gate oxide layer overlying a semiconductor substrate; providing a polysilicon layer overlying said gate oxide layer; providing a silicon oxynitride layer overlying said polysilicon layer; providing a silicon dioxide layer overlying said silicon oxynitride layer; providing a resist layer overlying said silicon dioxide layer; patterning said resist layer to form a resist mask that exposes a part of said silicon dioxide layer; patterning said polysilicon layer wherein said patterning is performed sequentially in a dry plasma etch chamber and wherein said patterning comprises: etching said resist mask to trim said resist mask; thereafter etching said silicon dioxide layer and said silicon oxynitride layer exposed by said resist mask to form a hard mask that exposes a part of said polysilicon layer; thereafter stripping away said resist mask; thereafter cleaning away polymer residue from said resist mask wherein said cleaning away comprises a chemistry containing CF 4 gas; and thereafter etching said polysilicon layer exposed by said hard mask wherein said etching comprises a main etch step followed by an overetch step; and stripping away said hard mask to complete the patterning of said polysilicon layer in the manufacture of the integrated circuit device.
Claim 19
Independent Claim
211 words
A method to pattern a polysilicon layer in the manufacture of an integrated circuit device comprising: providing a gate oxide layer overlying a semiconductor substrate; providing a polysilicon layer overlying said gate oxide layer; providing a silicon oxynitride layer overlying said polysilicon layer; providing a silicon dioxide layer overlying said silicon oxynitride layer; providing a resist layer overlying said silicon dioxide layer; patterning said resist layer to form a resist mask that exposes a part of said silicon dioxide layer; patterning said polysilicon layer wherein said patterning is performed sequentially in a dry plasma etch chamber and wherein said patterning comprises: etching said resist mask to trim said resist mask; thereafter etching said silicon dioxide layer and said silicon oxynitride layer exposed by said resist mask to form a hard mask that exposes a part of said polysilicon layer; thereafter stripping away said resist mask; thereafter cleaning away polymer residue from said resist mask wherein said cleaning away comprises a chemistry containing CF 4 gas; and thereafter etching said polysilicon layer exposed by said hard mask wherein said etching comprises a main etch step followed by an overetch step; and stripping away said hard mask to complete the patterning of said polysilicon layer in the manufacture of the integrated circuit device.
Claim 20
Dependent Claim
27 words
The method according to claim 16 wherein said step of etching said silicon dioxide layer and said silicon oxynitride layer comprises a chemistry of CF 4 gas.
Claim 21
Dependent Claim
22 words
The method according to claim 16 wherein said step of stripping away said resist layer comprises a chemistry containing O 2 gas.
Claim 22
Dependent Claim
29 words
The method according to claim 16 wherein said step of etching said polysilicon layer comprises a chemistry of: HBr gas, Cl 2 gas, He—O 2 gas, and combinations thereof.
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