Patent US6271091B1 successfully refreshed from Google Patents.
US6271091B1
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Method of fabricating flash memory cell
Assignee: SK Hynix Inc
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Filing: 1998-11-09
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Granted: 2001-08-07
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Expires: 2018-11-09
Abstract
Abstract A method of fabricating a flash memory cell includes the steps of forming a field insulating layer on a substrate, forming a first gate oxide layer on the substrate, forming a floating gate, a first insulating layer and a control gate on the first gate oxide layer, forming sidewall insulating layers at both sides of the floating gate and the control gate, forming sidewall conductive layers on the sidewall insulating layers, and forming a source and drain region in the substrate.
Inventors
- 👤 Eun-Jeong Park
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 01:47
CPC Classifications
H; H10; H10B; H10B20/00; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0411; H10D30/60; H10D30/68; H10D30/6891; H10D30/6892; Y; Y10; Y10S; Y10S257/00; Y10S257/90
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
139 words
A method of fabricating a flash memory cell, comprising the steps of: forming a field insulating layer on a substrate; forming a first gate oxide layer on the substrate; forming a floating gate, a first insulating layer and a control gate on the first gate oxide layer; forming sidewall insulating layers at both sides of the floating gate and the control gate, wherein a first side of the sidewall insulating layers on the floating gate and the first side of the sidewall insulating layers on the control gate are formed at different times, and the first side of the sidewall insulating layers on the control gate acts as a mask in forming both the floating gate and a source/drain region; forming sidewall conductive layers on the sidewall insulating layers; and forming a source and drain region in the substrate.
Claim 2
Independent Claim
139 words
A method of fabricating a flash memory cell, comprising the steps of: forming a field insulating layer on a substrate; forming a first gate oxide layer on the substrate; forming a floating gate, a first insulating layer and a control gate on the first gate oxide layer; forming sidewall insulating layers at both sides of the floating gate and the control gate, wherein a first side of the sidewall insulating layers on the floating gate and the first side of the sidewall insulating layers on the control gate are formed at different times, and the first side of the sidewall insulating layers on the control gate acts as a mask in forming both the floating gate and a source/drain region; forming sidewall conductive layers on the sidewall insulating layers; and forming a source and drain region in the substrate.
Claim 3
Dependent Claim
88 words
The method according to claim 1 , wherein the steps of forming a floating gate, a first insulating layer and a control gate include the steps of: depositing a first polysilicon layer on the first gate oxide layer; depositing an insulating layer on the first polysilicon layer to form a first insulating layer; depositing a second polysilicon layer to form a control gate; forming a first sidewall insulating layer on a first side of the control gate; and patterning the first polysilicon layer to form a floating gate.
Claim 4
Dependent Claim
33 words
The method according to claim 1 , wherein a second side of the sidewall insulating layers includes the sidewall insulating layers formed on second sides of the control gate and the floating gate.
Claim 5
Dependent Claim
37 words
The method according to claim 1 , wherein the first side of the sidewall insulating layers formed on the control gate is thicker than the first side of the sidewall insulating layers formed on the floating gate.
Claim 6
Dependent Claim
30 words
The method according to claim 1 , wherein a thickness of the first side of the sidewall insulating layers formed on the floating gate is about 200 to 400 Å.
Claim 7
Dependent Claim
22 words
The method according to claim 1 , wherein a length of the floating gate is larger than that of the control gate.
Claim 8
Dependent Claim
15 words
The method according to claim 1 , wherein the sidewall conductive layers are polysilicon layers.
Claim 9
Dependent Claim
34 words
The method according to claim 1 , further comprising the step of: forming a lightly-doped drain region in the substrate below a first side of the floating gate after forming the sidewall insulating layers.
Claim 10
Dependent Claim
33 words
The method according to claim 2 , further comprising the step of: forming lightly-doped drain region in the substrate below a first side of the control gate after patterning the first polysilicon layer.
Claim 11
Dependent Claim
20 words
The method according to claim 1 , wherein the step of forming a first gate oxide layer includes thermal oxidation.
Claim 12
Dependent Claim
22 words
The method according to claim 1 , wherein the step of forming sidewall insulating layers include one of CVD and thermal oxidation.
Claim 13
Dependent Claim
22 words
The method according to claim 1 , wherein the step of forming sidewall insulating layers are one of PSG, BSG and BPSG.
Claim 14
Dependent Claim
21 words
The method according to claim 3 , wherein the second side of the sidewall insulating layers are formed of thermal oxidation.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2004-08-06 | 2005-02-05 | 2005-08-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2008-08-06 | 2009-02-05 | 2009-08-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2012-08-06 | 2013-02-05 | 2013-08-07 | $7700.00 | Window Closed / Lapsed |